On-chip eye viewer architecture for highspeed transceivers
First Claim
1. A method of manufacturing an integrated circuit (IC) device comprising:
- providing an equalizer of the IC device, wherein the equalizer comprises a plurality of internal nodes, each of the internal nodes being at an output of a respective stage of equalization in the equalizer, wherein each of the internal nodes is selectable for analysis of a serial input signal propagated through the equalizer; and
providing eye viewer circuitry of the IC device to analyze a serial signal from a selected internal node to determine coordinates useful for generating a corresponding eye diagram of the serial signal.
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Accused Products
Abstract
System, methods, and devices for determining an eye diagram of a serial input signal to an integrated circuit without an oscilloscope are provided. For example, one embodiment of an integrated circuit device may be capable of determining an eye diagram associated with a serial input signal either during or after equalization. The device may include an equalizer and eye viewer circuitry configured to select a node of the equalizer for eye monitoring of the input signal, which may be during or after equalization. In one embodiment, the eye viewer circuitry may provide a separate sampler for each respective node, while sharing a control logic and phase interpolator among the samplers. The eye viewer circuitry may determine horizontal and vertical boundaries of the eye diagram associated with the serial input signal, as seen from the selected node of the equalizer.
51 Citations
29 Claims
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1. A method of manufacturing an integrated circuit (IC) device comprising:
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providing an equalizer of the IC device, wherein the equalizer comprises a plurality of internal nodes, each of the internal nodes being at an output of a respective stage of equalization in the equalizer, wherein each of the internal nodes is selectable for analysis of a serial input signal propagated through the equalizer; and providing eye viewer circuitry of the IC device to analyze a serial signal from a selected internal node to determine coordinates useful for generating a corresponding eye diagram of the serial signal. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An integrated circuit (IC) device comprising:
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a receiver; an equalizer configured to equalize a serial input signal received by the receiver, wherein the equalizer comprises a plurality of equalizer stages, wherein the output of each equalizer stage comprises an internal node of the equalizer, and the equalizer is configured such that each of the internal nodes is selectable for analysis of a serial signal at the internal node; a clock and data recovery circuit configured to receive an output of the equalizer and output a recovered data signal and a recovered clock signal; eye viewer circuitry configured to select one of the internal nodes of the equalizer for analysis of a serial signal at the selected internal node and to determine an eye diagram corresponding to the serial signal from the selected internal node; and a deserializer configured to output a first parallel signal based upon the recovered data signal and the recovered clock signal from the clock and data recovery circuit when the IC device is operating in a normal traffic mode and to output a second parallel signal based upon a selected offset data signal and an offset clock signal from the eye viewer circuitry when the IC device is operating in an eye viewer mode, wherein the selected offset data signal is determined by sampling the serial signal from the selected internal node. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. An integrated circuit (IC) device comprising:
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a receiver comprising an equalizer configured to equalize a received serial input signal; a clock and data recovery (CDR) circuit configured to receive the equalized serial input signal and to output a recovered data signal and a recovered clock signal; eye viewer circuitry configured to receive a serial signal from the IC device for analysis, to output an offset data signal and an offset clock signal, and to determine an eye diagram of the serial signal when the IC device is operating in an eye viewer mode; a first deserializer configured output a first parallel signal based upon the recovered data signal and the recovered clock signal from the CDR circuit when the IC device is operating in either of a normal mode or an uninterrupted eye viewer mode, and to output the first parallel signal based upon the offset data signal and the offset clock signal from the eye viewer circuitry if the IC device is operating in an interrupted eye viewer mode, wherein the second parallel signal is provided to an error checking circuitry for determination of an error rate signal; and a second deserializer configured to output a second parallel signal based upon the offset data signal and the offset clock signal when the IC is operating in the uninterrupted eye viewer mode, wherein the third parallel signal is provided to the error checking circuit for determination of the error rate signal. - View Dependent Claims (20, 21, 22, 23, 24)
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25. A method comprising:
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receiving a serial input signal at a receiver of an integrated circuit (IC) device; equalizing the serial input signal using a equalizer comprising a plurality of equalizer stages to produce an equalized signal; selecting a serial signal from the output of one of equalizer stages for analysis; sampling the selected serial signal at variable phase offsets from a clock signal associated with the equalized signal and at variable threshold voltages using a sampler associated with the selected serial signal; detecting an error rate in the sampled signal using error checking circuitry; determining an error rate signal based on the detected error rate; and determining one or more coordinates useful for generating an eye diagram of the selected serial signal based at least in part on the error rate signal using circuitry configured to vary the phase offsets and the threshold voltages. - View Dependent Claims (26, 27, 28, 29)
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Specification