Hybrid electronic design system and reconfigurable connection matrix thereof
First Claim
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1. A hybrid electronic design system, comprising:
- a virtual unit, including a plurality of proxies, a plurality of virtual components and a driver, wherein the virtual components is connected to the driver via the plurality of proxies; and
a hybrid unit, including an emulating unit, a physical unit and a chip level transactor, wherein the chip level transactor is connected to the emulating unit and the physical unit;
wherein the emulating unit comprises a first connection matrix and a plurality of emulating components, and the emulating components connect to the first connection matrix; and
wherein the hybrid unit comprises a plurality of second component transactors, the first connection matrix being connected to the chip level transactor via the plurality of second component transactors; and
a communication channel for connecting the driver of the virtual unit with the chip level transactor of the hybrid unit.
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Abstract
A hybrid electronic design system and a reconfigurable connection matrix thereof are disclosed. The electronic design system includes a virtual unit, a hybrid unit and a communication channel. The virtual unit further includes a plurality of proxy units, a plurality of virtual components and a driver. The virtual components are connected with the driver via the proxy units. The hybrid unit further includes an emulate unit, a physical unit and a chip level transactor. The chip level transactor is connected with the emulate unit and the physical unit. The communication channel is connected with the driver of the virtual unit and the chip level transactor of the hybrid unit.
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Citations
9 Claims
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1. A hybrid electronic design system, comprising:
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a virtual unit, including a plurality of proxies, a plurality of virtual components and a driver, wherein the virtual components is connected to the driver via the plurality of proxies; and a hybrid unit, including an emulating unit, a physical unit and a chip level transactor, wherein the chip level transactor is connected to the emulating unit and the physical unit; wherein the emulating unit comprises a first connection matrix and a plurality of emulating components, and the emulating components connect to the first connection matrix; and wherein the hybrid unit comprises a plurality of second component transactors, the first connection matrix being connected to the chip level transactor via the plurality of second component transactors; and a communication channel for connecting the driver of the virtual unit with the chip level transactor of the hybrid unit. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A hybrid electronic design system, comprising:
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a virtual unit, including a plurality of proxies, a plurality of virtual components and a driver, the virtual components being connected to the driver via the plurality of proxies; a hybrid unit, including an emulating unit, a physical unit and a chip level transactor, wherein the chip level transactor is connected to the emulating unit and the physical unit; wherein the physical unit comprises a connection matrix and a plurality of physical components, and the plurality of physical components connecting to the connection matrix; and wherein the hybrid unit comprises a plurality of second component transactors, and the second connection matrix is connected to the chip level transactor via the plurality of second component transactors; and a communication channel for connecting the driver of the virtual unit with the chip level transactor of the hybrid unit. - View Dependent Claims (9)
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Specification