System and method for storing information in a multi-level cell memory

• US 8,745,317 B2
• Filed: 04/05/2011
• Issued: 06/03/2014
• Est. Priority Date: 04/07/2010
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: DensBits Technologies Ltd. (Broadcom, Inc.)
• Inventors: Weingarten, Hanan
• Primary Examiner(s): Gu, Shawn X
• Application Number:
  US13/080,502
• Publication Number:
  US 20110252188A1
• Time in Patent Office: 1,155 Days
• Field of Search: None
• US Class Current: 711/103
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data

Abstract

A method comprising: obtaining a value of source data; encoding the value of source data using an encoding process, to thereby obtain an encoded value; calculating a difference value based on the value of source data and the encoded value; mapping the difference value to a multi-digit binary value associated with a voltage level based on a mapping scheme; causing a cell of a multi-level cell memory to store the mapped multi-digit binary value; and causing the encoded value of source data to be stored in the multi-level cell memory.

Claims

1. A method comprising:

obtaining a value of source data;

encoding the value of source data using an encoding process, to thereby obtain an encoded value;

calculating a difference value based on the value of source data and the encoded value;

mapping the difference value to a multi-digit binary value associated with a voltage level based on a mapping scheme;

causing a cell of a multi-level cell memory to store the mapped multi-digit binary value; and

causing the encoded value of source data to be stored in the multi-level cell memory.

2. The method of claim 1, wherein the mapping scheme comprises mapping difference values within increasing ranges to multi-digit binary values having increasing associated voltage levels.

3. The method of claim 2, wherein the multi-digit binary values are associated with respective voltage levels, so that no more than one bit of the multi-digit binary values differs between adjacent voltage levels.

4. The method of claim 1, wherein causing the cell of the multi-level cell memory to store the mapped multi-digit binary value comprises sending an instruction to a memory controller associated with the multi-level cell memory.

5. The method of claim 1, wherein the difference value is a quantized difference value, and wherein calculating the quantized difference value comprises:

calculating a difference between the value of source data and the encoded value, and determining which of a plurality of quantized difference values includes the calculated difference.

6. The method of claim 5, wherein each of the quantized difference values correspond to an equal range of corresponding difference values.

7. The method of claim 5, wherein at least two of the quantized difference values correspond to unequal ranges of corresponding difference values.

8. The method of claim 1, wherein causing the cell of the multi-level cell memory to store the mapped multi-digit binary value comprises programming the cell of the multi-level cell memory by:

for a plurality of mapped multi-digit binary values, writing each significant bit of the mapped multi-digit binary values to each of a plurality of corresponding page buffers, respectively, until the page buffers are full, and programming pages of the multi-level cell memory based on the page buffers.

9. The method of claim 1, further comprising:

obtaining first and second values of source data;

encoding the first and second values of source data using an encoding process, to thereby obtain first and second encoded values, respectively;

calculating first and second difference values, wherein the first difference value is based on the first value of source data and the first encoded value, and wherein the second difference value is based on the second value of source data and the second encoded value; and

mapping the first and second difference values to a single multi-digit binary value associated with a voltage level using the mapping scheme.

10. The method of claim 9, wherein the mapping scheme comprises mapping the first and second difference values to multi-digit binary values such that for adjacent voltage levels associated with respectively adjacent mapped multi-digit binary values, no more than one of the first and second difference values differs by no more than one difference level.

11. The method of claim 9, wherein one of the first and second difference values is a two-bit binary number, and the other of the first and second difference values is a one-bit binary number, and wherein the mapping scheme includes up to eight voltage levels corresponding to up to eight possible combined first and second difference values.

12. The method of claim 9, wherein each of first and second difference values is a two-bit binary number, and wherein the mapping scheme includes up to sixteen voltage levels corresponding to up to sixteen possible combined first and second difference values.

13. The method of claim 1, wherein source data is raw image data, wherein the encoding process is a Joint Photographic Experts Group (JPEG) encoding process, and further comprising performing at least one of entropy coding and error correction coding on encoded data prior to causing the encoded value of source data to be stored.

14. A method comprising:

causing a value of encoded source data to be obtained from a multi-level cell memory;

decoding the value of encoded source data to obtain a value of decoded source data;

causing a multi-digit binary value associated with the value of encoded source data to be obtained from a cell of the multi-level cell memory;

mapping the obtained multi-digit binary value to a difference value based on a mapping scheme; and

modifying the value of decoded source data based on the difference value to obtain retrieved data.

15. The method of claim 14, wherein causing the multi-digit binary value to be obtained comprises sending an instruction to a memory controller associated with the multi-level cell memory.

16. The method of claim 15, further comprising:

causing first and second values of encoded source data to be obtained from a multi-level cell memory, decoding the first and second values of encoded source data to obtain first and second values of decoded source data, causing a multi-digit binary value associated with the first and second values of encoded source data to be obtained from a cell of the multi-level cell memory, mapping the obtained multi-digit binary value to first and second difference values based on the mapping scheme, modifying the first and second values of decoded source data based on the first and second difference values, to obtain first and second values of retrieved data.

17. A non-transitory computer readable medium that stores instructions that once executed by a computer cause the computer to execute the stages of:

obtaining a value of source data;

encoding the value of source data using an encoding process, to thereby obtain an encoded value;

calculating a difference value based on the value of source data and the encoded value;

mapping the difference value to a multi-digit binary value associated with a voltage level based on a mapping scheme;

causing a cell of a multi-level cell memory to store the mapped multi-digit binary value; and

causing the encoded value of source data to be stored in the multi-level cell memory.

18. The non-transitory computer readable medium of claim 17, wherein the mapping scheme comprises mapping difference values within increasing ranges to multi-digit binary values having increasing associated voltage levels.

19. The non-transitory computer readable medium of claim 18, wherein the multi-digit binary values are associated with respective voltage levels, so that no more than one bit of the multi-digit binary values differs between adjacent voltage levels.

20. The non-transitory computer readable medium of claim 17, wherein the non-transitory computer readable medium stores instructions for sending an instruction to a memory controller associated with the multi-level cell memory.

21. The non-transitory computer readable medium of claim 17, wherein the difference value is a quantized difference value, and wherein the non-transitory computer readable medium stores instructions for calculating a difference between the value of source data and the encoded value, and determining which of a plurality of quantized difference values includes the calculated difference.

22. The non-transitory computer readable medium of claim 21, wherein each of the quantized difference values correspond to an equal range of corresponding difference values.

23. The non-transitory computer readable medium of claim 21, wherein at least two of the quantized difference values correspond to unequal ranges of corresponding difference values.

24. The non-transitory computer readable medium of claim 17, wherein the non-transitory computer readable medium stores instructions for programming the cell of the multi-level cell memory by:

for a plurality of mapped multi-digit binary values, writing each significant bit of the mapped multi-digit binary values to each of a plurality of corresponding page buffers, respectively, until the page buffers are full, and programming pages of the multi-level cell memory based on the page buffers.

25. The non-transitory computer readable medium of claim 17, wherein the non-transitory computer readable medium stores instructions for:

obtaining first and second values of source data;

encoding the first and second values of source data using an encoding process, to thereby obtain first and second encoded values, respectively;

calculating first and second difference values, wherein the first difference value is based on the first value of source data and the first encoded value, and wherein the second difference value is based on the second value of source data and the second encoded value; and

mapping the first and second difference values to a single multi-digit binary value associated with a voltage level using the mapping scheme.

26. The non-transitory computer readable medium of claim 25, wherein the mapping scheme comprises mapping the first and second difference values to multi-digit binary values such that for adjacent voltage levels associated with respectively adjacent mapped multi-digit binary values, no more than one of the first and second difference values differs by no more than one difference level.

27. The non-transitory computer readable medium of claim 25, wherein one of the first and second difference values is a two-bit binary number, and the other of the first and second difference values is a one-bit binary number, and wherein the mapping scheme includes up to eight voltage levels corresponding to up to eight possible combined first and second difference values.

28. The non-transitory computer readable medium of claim 25, wherein each of first and second difference values is a two-bit binary number, and wherein the mapping scheme includes up to sixteen voltage levels corresponding to up to sixteen possible combined first and second difference values.

29. The non-transitory computer readable medium of claim 17, wherein source data is raw image data, wherein the encoding process is a JPEG encoding process, and wherein the non-transitory computer readable medium stores instructions for performing at least one of entropy coding and error correction coding on encoded data prior to causing the encoded value of source data to be stored.

30. A non-transitory computer readable medium that stores instructions that once executed by a computer cause the computer to execute the stages of causing a value of encoded source data to be obtained from a multi-level cell memory;

decoding the value of encoded source data to obtain a value of decoded source data;

causing a multi-digit binary value associated with the value of encoded source data to be obtained from a cell of the multi-level cell memory;

mapping the obtained multi-digit binary value to a difference value based on a mapping scheme; and

modifying the value of decoded source data based on the difference value to obtain retrieved data.

31. The non-transitory computer readable medium of claim 30, wherein the non-transitory computer readable medium stores instructions for sending an instruction to a memory controller associated with the multi-level cell memory.

32. The non-transitory computer readable medium of claim 31, wherein the non-transitory computer readable medium stores instructions for causing first and second values of encoded source data to be obtained from the multi-level cell memory, decoding the first and second values of encoded source data to obtain first and second values of decoded source data, causing a multi-digit binary value associated with the first and second values of encoded source data to be obtained from a cell of the multi-level cell memory, mapping the obtained multi-digit binary value to first and second difference values based on the mapping scheme, modifying the first and second values of decoded source data based on the first and second difference values, to obtain first and second values of retrieved data.