Remapping for memory wear leveling
First Claim
1. A method for remapping for wear leveling of a memory, the method implemented as logic, comprising:
- receiving a memory operation, the memory operation including a logical memory address;
dividing the logical address into a logical block address portion, a logical line address portion, and a logical subline address portion;
performing a block remapping, producing a physical block address;
selecting a line remap key using one of the logical block address portion and the physical block address to perform a line remapping within a block of a same block size that the block remapping is performed;
applying the line remap key to the logical line address portion to produce a physical line address;
producing a physical subline address; and
combining the physical block, line, and subline addresses to produce a physical address for the memory operation.
2 Assignments
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Accused Products
Abstract
A method and a corresponding apparatus provide for remapping for wear leveling of a memory. The method is implemented as logic and includes the steps of receiving a memory operation, the memory operation including a logical memory address; dividing the logical address into a logical block address portion, a logical line address portion, and a logical subline address portion; translating the logical block address portion into a physical block address; selecting a line remap key; applying the line remap key to the logical line address portion to produce a physical line address; producing a physical subline address portion; and combining the physical block, line, and subline address portions to produce a physical address for the memory operation.
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Citations
20 Claims
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1. A method for remapping for wear leveling of a memory, the method implemented as logic, comprising:
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receiving a memory operation, the memory operation including a logical memory address; dividing the logical address into a logical block address portion, a logical line address portion, and a logical subline address portion; performing a block remapping, producing a physical block address; selecting a line remap key using one of the logical block address portion and the physical block address to perform a line remapping within a block of a same block size that the block remapping is performed; applying the line remap key to the logical line address portion to produce a physical line address; producing a physical subline address; and combining the physical block, line, and subline addresses to produce a physical address for the memory operation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A remapping apparatus, used for wear leveling and implemented as logic, wherein a memory receives translated physical addresses for certain memory operations, the translated physical addresses providing a leveling of use of areas of the memory, comprising:
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an address parsing function that divides a logical address into logical block, line, and subline address portions; a block remap table that performs a block remapping to produce a physical block address; a line remap table that provides a line remap key using one of the logical block address portion and the physical block address to perform a line remapping within a block of a same block size that the block remapping is performed; a line remap function that receives the line remap key and produces a physical line address; a subline translation device that produces a physical subline address based on the logical subline address portion; and a physical address function that produces a physical address based on the physical block, line, and subline addresses, wherein the physical address designates the location in the memory for a memory operation. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
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20. A method for remapping for wear leveling of a memory, the method implemented as logic, comprising:
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receiving a memory operation, the memory operation including a logical memory address; dividing the logical memory address into a logical block address portion, a logical line address portion, and a logical subline address portion; performing a block remapping, producing a physical block address; using said logical block address, selecting a line remap key to perform a line remapping within a block; applying the line remap key and the logical line address to a function which, using the line remap key as an input, produces a physical line address; producing a physical subline address; and combining the physical block, line, and subline addresses to produce a physical address for the memory operation.
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Specification