Over-current protection for a switch mode class D audio amplifier

• US 8,749,303 B2
• Filed: 05/06/2010
• Issued: 06/10/2014
• Est. Priority Date: 04/29/2010
• Status: Expired due to Fees

• Current Assignee: Dialog Semiconductor GmbH (Renesas Electronics Corporation)
• Original Assignee: Dialog Semiconductor GmbH (Renesas Electronics Corporation)
• Inventors: Amadi, Christophe, Teplechuk, Mykhaylo
• Primary Examiner(s): NGUYEN, HIEU P
• Application Number:
  US12/800,041
• Publication Number:
  US 20110267731A1
• Time in Patent Office: 1,496 Days
• Field of Search: 330/207.P, 330/298, 330/10, 330/251, 330/207.A
• US Class Current: 330/10
• CPC Class Codes: H03F 1/523 for amplifiers using field-effect devices H03F1/526 takes precedence
• CPC Class Codes: H03F 3/217 Class D power amplifiers; Switching amplifiers

Abstract

Circuits and methods for over-current protection of pulse-width modulation systems such as switch mode class D audio systems, DC-to-DC converters, or switch mode power supplies have been disclosed. Over-current protection has been achieved by introducing supply-scalable pulses to bring the modulation index of PWM pulses to a safe level. Additionally to the over-current protection a recovery circuit and method to be applied right after an over-current situation has been disclosed.

Claims

1. A method for detecting and solving an over-current situation of a pulse-width modulated system comprising the steps of:

(1) providing a pulse-width modulated system comprising a filter, means to detect an over-current situation, a PWM modulator, a pulse generator, means to multiplex output from pulse generator with output from PWM modulator;

(2) starting normal operation of the pulse-width modulated system;

(3) monitoring continuously data stream out of the PWM modulator in order to detect an over-current situation until the pulse modulated system is switched off;

(4) checking if an over-current situation is detected and, if so, go to step (5), otherwise repeat step (4);

(5) setting an over-current signal;

(6) enabling the pulse generator generating pulses having a supply-scalable duty cycle;

(7) multiplexing the output of the pulse generator with PWM modulator output;

(8) bounding output current by suitable modulation caused by pulses from the pulse generator;

(9) resetting over-current signal after over-current situation is solved; and

(10) resuming normal operation of the pulse-width modulated system and go back to step (4).

2. The method of claim 1 wherein said pulse-width modulated system is a switch mode class D audio amplifier.

3. The method of claim 1 wherein said pulse-width modulated system is a DC-to-DC converter.

4. The method of claim 1 wherein said pulse-width modulated system is a switch mode power supply.

5. The method of claim 1 wherein said means to detect an over-current situation by monitoring said data stream is performed by a counting device counting transitions occurring in a time period defined.

6. The method of claim 5 wherein an over-current situation is defined when no transitions are counted by said counting device during N clock periods.

7. The method of claim 6 wherein an over-current situation is defined when no transitions are counted by said counting device during at least two clock periods.

8. The method of claim 1 wherein said pulse generator generates pulses having a supply-scalable duty cycle with about 95% modulation index of the pulses generated.

9. The method of claim 8 wherein said supply-scalable duty cycle is achieved by setting the pulse width of the pulse-width modulated system proportional to the supply voltage.

10. The method of claim 1 wherein said means to multiplex is a logical XOR-gate.

11. The method of claim 1 wherein a method to recover the pulse-width modulated system after an over-current situation comprising the steps of:

(11) checking if an over-current signal has been just reset after an over-current situation and, if so, go to step (12), else repeat the check of step (11);

(12) switching the filter from a higher order mode to a lower order mode for a specified time after the PWM modulator has returned to normal operation after an over-current situation; and

(13) go to step (10).

12. The method of claim 11 wherein said specified time has duration in the order of magnitude of 16 μ

seconds.

13. The method of claim 11 wherein said switching the filter from a high order to a lower order is performed by bypassing an integrating capacitor within a first integrator stage of the filter.

14. The method of claim 1 wherein a method to recover the pulse-width modulated system after an over-current situation comprises reducing a gain of a principal analog feedback loop.

15. The method of claim 14 wherein said gain is reduced by inserting a current source at virtual ground of an integrator of the filter.

16. The method of claim 14 wherein said gain is reduced by dumping charges onto an integrating capacitor of the filter.

17. The method of claim 14 wherein said gain is reduced by employing automatic gain control.

18. A circuit for a digital over-current protection of a pulse-width modulation system comprising:

a filter capable of filtering input signals of the pulse-with modulation system;

a PWM modulator having inputs and an output, wherein a first input is the output of said filter, wherein said PWM modulator is capable of receiving triangular pulses at a second input, and wherein said PWM modulator capable of generating a PWM data stream at the output;

a detector capable of monitoring said data stream , wherein said detector is capable of receiving clock pulses as input and, when no transitions in the data stream occur within a defined time period, is capable of setting an over-current flag;

a pulse generator, while the over-current flag is set, is capable of generating pulses having a supply-scalable duty cycle;

a multiplexing means capable of multiplexing pulses generated by said pulse generator with the PWM data stream from the PWM modulator;

a power stage having an input and an output, wherein the input is the output of said multiplexing means and the output is connected to a load and to a feedback circuit; and

said feedback circuit having an input and an output wherein the input is connected to the output of the power stage and the output of the feedback circuit is connected to the input of the pulse-width modulated system.

19. The circuit of claim 18 wherein said pulse-width modulated system is a switch mode class D audio amplifier.

20. The circuit of claim 18 wherein said pulse-width modulated system is a switch mode power supply.

21. The circuit of claim 18 wherein said detector is a counter counting transitions of said PWM data stream.

22. The circuit of claim 18 wherein said supply scalable duty cycle is proportional to the supply voltage.

23. The circuit of claim 18 wherein said pulses generated have a modulation index ensuring a safe maximum output current of the power stage.

24. The circuit of claim 23 wherein said pulses generated have a modulation index of about 95%.

25. The circuit of claim 18 wherein said multiplexing means is a logical exclusive disjunction XOR stage.

26. The circuit of claim 18 wherein an additional circuit to recover the pulse-width modulated system after an over-current situation comprises a connection between said detector and said filter.

27. The circuit of claim 26 wherein right after the over-current flag is reset a high order of the filter is reduced to a lower order for a defined time span.

28. The circuit of claim 27 wherein said time span is in the order of magnitude of 16 μ

seconds.

29. The circuit of claim 26 wherein the pulse-width modulated system is recovered after an over-current situation by reducing a gain of a principal analog feedback loop.

30. The circuit of claim 29 wherein said gain is reduced by inserting a current source at virtual ground of an integrator of the filter.

31. The circuit of claim 29 wherein said gain is reduced by dumping charges onto an integrating capacitor of the filter.

32. The circuit of claim 29 wherein said gain is reduced by employing automatic gain control.

33. The circuit of claim 18 wherein said feedback circuit comprises an input resistor and two or more feedback resistors.