Power line network system and method

• US 8,750,395 B1
• Filed: 12/22/2011
• Issued: 06/10/2014
• Est. Priority Date: 12/22/2011
• Status: Active Grant

• Current Assignee: Landis and Gyr Technologies LLC (Landis+Gyr Group AG)
• Original Assignee: Landis and Gyr Technologies LLC (Landis+Gyr Group AG)
• Inventors: Haug, Stuart L., Woodruff, Roger W.
• Primary Examiner(s): Kim, Kevin
• Application Number:
  US13/334,645
• Time in Patent Office: 901 Days
• Field of Search: 375/257, 375/259, 375/284, 375/285, 375/295, 375/296
• US Class Current: 375/259
• CPC Class Codes: H04B 2203/5416 by adding signals to the wave form of the power source
• CPC Class Codes: H04B 2203/5433 Remote metering
• CPC Class Codes: H04B 2203/5487 cables
• CPC Class Codes: H04B 3/54 Systems for transmission via power distribution lines
• CPC Class Codes: H04B 3/542 the information being in digital form
• CPC Class Codes: H04B 3/56 Circuits for coupling, blocking, or by-passing of signals
• CPC Class Codes: H04L 27/0002 analog front ends; means for connecting modulators, demodulators or transceivers to a transmission line duplex arrangements H04L5/143

Abstract

Various aspects of the instant disclosure are directed towards communicating symbols over a power line carrying alternating current, based upon frequency variations in the alternating current. In accordance with some embodiments, a line driver couples data-carrying symbols over the power line, via a waveform. Variations in the alternating current are monitored and used for accessing a lookup table that stores data entries that define data useful for providing steps of the waveform. The accessed data entries are used to drive a line driver with stepped data, and therein modulating alternating current on the power line with the data-carrying symbols at a frequency that is tied to the frequency of the alternating current.

Claims

1. A circuit comprising:

a line driver configured and arranged to couple data-carrying symbols over a power line, via a waveform, that carries an alternating current signal having a frequency or phase that varies, relative to a frequency or phase of previous cycles of the alternating current signal, the data-carrying symbols corresponding to respective information signals;

a signal-monitoring circuit configured and arranged for monitoring variations in the alternating current signal;

a lookup table configured and arranged to store data entries that define, at least in part, data useful for providing steps of the waveform; and

a logic circuit configured and arranged to access the data entries in the lookup table, in response to the signal-monitoring circuit, and thereby feed the line driver with stepped data that is processed for modulating the alternating current of the power line with the data-carrying symbols, wherein the steps provided by accessing the lookup table are processed to account for the variations in the alternating current signal.

2. The circuit of claim 1, wherein the steps are signal-level steps and wherein the lookup table is accessed a predetermined number of times to account for the variations in the alternating current signal.

3. The circuit of claim 1, wherein the logic circuit is configured and arranged to access the data entries to generate one of a plurality of waveforms that would be responsive to monitored variations in the alternating current signal, and wherein the lookup table includes data entries useful for accounting for the variations in the alternating current signal based upon the access to the steps for feeding the line driver with the stepped data.

4. The circuit of claim 1, wherein the logic circuit is configured and arranged to feed the line driver with stepped data that is processed for modulating the alternating current of the power line with a complex waveform that represents the data-carrying symbols.

5. The circuit of claim 1, wherein the steps are time-based steps, and the logic circuit is configured and arranged to access the lookup table to access the time-based steps in order to account for the variations in the alternating current signal.

6. The circuit of claim 1, wherein the signal-monitoring circuit includes a frequency-locked monitoring circuit configured and arranged for monitoring the frequency and for tracking or indicating variations in the frequency of the alternating current signal, and wherein the logic circuit is configured and arranged to access the stored data entries to feed the line driver with stepped data to drive a waveform on the AC line, the stepped data being accessed a target number of times during each cycle of the alternating current signal.

7. The circuit of claim 1, wherein the line driver and the logic circuit are configured and arranged, with the lookup table, to transmit a signal based upon the same number of equally time-spaced accesses to the lookup table for consecutive cycles of the alternating current signal that have respectively different periods.

8. The circuit of claim 7, wherein the line driver and the logic circuit are configured and arranged, with the lookup table, to transmit a signal based upon a target number of accesses to the lookup table, the target number being a number between 50,000 and 200,000 per second, or 500-5000 times per cycle.

9. The circuit of claim 7, wherein the logic circuit is configured and arranged to determine the time spacing between the accesses based upon a previous cycle of the alternating current signal.

10. The circuit of claim 1, wherein the line driver, the lookup table and the logic circuit are part of a direct digital synthesis signal generator.

11. The circuit of claim 1, wherein the line driver, the lookup table and the logic circuit are part of a feedback control loop that is configured and arranged to couple the data-carrying symbols via a waveform that is locked to variations in the frequency of the alternating current signal for consecutive cycles of the alternating current that have respectively different periods.

12. The circuit of claim 1, wherein the line driver is configured and arranged to couple data-carrying symbols that are multi-data-bit symbols arranged to be transmitted by conveying a pair of discrete-frequency signals and a phase offset between the pair of frequency signals.

13. The circuit of claim 12, wherein the logic circuit synthesizes the multi-data-bit symbols into a plurality of sine waves and sums the sine waves to create a signal used by the line driver for transmission over the power line.

14. A method for coupling data-carrying symbols over a power line that carries an alternating current signal having a frequency or phase that varies, relative to a frequency or phase of previous cycles of the alternating current signal, the data-carrying symbols corresponding to respective information signals, the method comprising:

monitoring variations in the alternating current signal;

storing, in a lookup table, data entries that define, at least in part, data useful for providing steps of a waveform;

accessing the data entries in the lookup table, in response to the monitored variations in the alternating current signal, and feeding a line driver with stepped data that is processed for modulating the alternating current of the power line with the data-carrying symbols, wherein the steps provided by accessing the lookup table are processed to account for the monitored variations in the alternating current signal; and

coupling the data-carrying symbols over a power line, via a waveform corresponding to the stepped data.

15. The method of claim 14, wherein the steps are signal-level steps and wherein accessing the data entries includes accessing the data entries a predetermined number of times to account for the variations in the alternating current signal.

16. The method of claim 14, wherein accessing the data entries and feeding a line driver with stepped data includes generating one of a plurality of waveforms that would be responsive to monitored variations in the alternating current signal.

17. The method of claim 14, wherein feeding a line driver includes feeding the line driver with stepped data processed for modulating the alternating current of the power line with the data-carrying symbols that represent a combination of signals respectively representing different frequencies.

18. The method of claim 14, wherein

storing data entries include storing data entries in the lookup table that define time-based steps,

accessing the data entries includes accessing the time-based steps in order, and

feeding the line driver includes feeding the line driver with the steps in order to account for the variations in the alternating current signal.

19. The method of claim 14, wherein feeding a line driver with stepped data that is processed for modulating the alternating current of the power line includes, accessing the data entries with the same number of equally time-spaced accesses to the lookup table for consecutive cycles of the alternating current signal that have respectively different periods.

20. The method of claim 19,

further including determining a time spacing between accesses to the data entries based upon a previous cycle of the alternating current signal, and

wherein accessing the data entries and feeding a line driver includes accessing the data entries and feeding the line driver based upon the determined time spacing.

21. The method of claim 14, wherein coupling the data-carrying symbols over a power line includes coupling the data-carrying symbols via a waveform that is locked to monitored variations in the frequency of the alternating current signal for consecutive cycles of the alternating current that have respectively different periods.

22. The method of claim 14, wherein coupling the data-carrying symbols over a power line includes coupling multi-data-bit symbols to the power line by conveying a set of discrete-frequency signals and a plurality of phase offsets between the discrete-frequency signals of the set.

23. The method of claim 14, wherein accessing the data entries and feeding a line driver includes synthesizing multi-data-bit symbols into two sine waves and summing the sine waves to create a signal to drive a line driver for transmitting the multi-data-bit symbols over the power line.

24. The method of claim 14,

further including determining a floating-point time-spacing value for a time between accesses to the data entries based upon the monitored variations in the alternating current signal, accumulating unused fractions of the floating-point time-spacing value in an accumulator, and generating a fixed-point target value based upon the floating-point time-spacing value and the accumulated unused fractions, and

wherein accessing the data entries includes accessing the data entries at the fixed-point target value a number of times within a particular cycle of the alternating current signal.

25. A method comprising:

in a processing circuit,

generating a plurality of interrupts using a frequency synthesizer having a period defined by a time between the plurality of interrupts, the time between the interrupts being set based upon a fixed number of interrupts to be generated during a cycle of alternating current (AC) carried on power lines over which data is to be communicated;

for each of a plurality of symbols, providing two tone values as discrete-frequency signals and phase offsets therebetween, based upon data in the symbols;

for each of the plurality of interrupts, accessing values for each tone from a lookup table, based upon the tone values and the phase offset, and

driving a transceiver based upon the combined accessed values from the lookup table.

26. The method of claim 25, wherein accessing values for each of first and second tones includes

setting an initial value in first and second accumulators respectively for the first and second tones, a difference between the initial values being based upon the phase offset,

using the tone values and phase offset to calculate first and second tweak values respectively representing an amount added to the first and second accumulators for each transmit interrupt, and

for each interrupt, accessing the lookup table based upon the value in the accumulator for the respective tones, and increasing the values in the first and second accumulators respectively using the first and second tweak values to be used at the next respective interrupt, therein sweeping the lookup table at the respective frequencies of the first and second tones.

27. A circuit-based apparatus for communicating over power distribution lines carrying alternating current (AC) power, the apparatus comprising

a digital to analog converter (DAC);

a frequency locked loop (FLL) circuit configured and arranged to generate a target value defining a base period for each interrupt, based upon a frequency of the AC power, the number of interrupts being generated for each cycle of the AC power being constant;

a symbol generator circuit configured and arranged to, for each symbol,

select two frequencies and a phase based upon a binary pattern being communicated over the power distribution lines,

use the selected frequencies and phase to calculate counter tweak values representing an amount added to an accumulator for each transmit interrupt, and

calculate a start value for the accumulator for a second tone based upon a phase of the symbol;

a data storage circuit that stores a sine table having values representing step values of a sine wave having half a maximum voltage of the DAC; and

a synthesizer circuit configured and arranged to,

in response to each interrupt generated by the FLL circuit, generate and provide an output signal to the DAC by indexing into the sine table to retrieve two sine values respectively based upon bits in each of two accumulators, the sine values corresponding to first and second tones having a fixed phase relationship, and add the retrieved sine values to generate combined tones, and

in response to a new symbol, clear the accumulator for the first tone and set the accumulator for the second tone to the start value provided by the symbol generator, therein setting a sweep of the sine table at an offset that matches the phase difference of the symbols.