Robust inspection alignment of semiconductor inspection tools using design information

• US 8,750,597 B2
• Filed: 11/23/2011
• Issued: 06/10/2014
• Est. Priority Date: 11/23/2011
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Patterson, Oliver D., Wu, Kevin T.
• Primary Examiner(s): MARIAM, DANIEL G
• Application Number:
  US13/303,440
• Publication Number:
  US 20130129189A1
• Time in Patent Office: 930 Days
• Field of Search: 382141-151
• US Class Current: 382/151
• CPC Class Codes: G06T 2207/30148 Semiconductor; IC; Wafer
• CPC Class Codes: G06T 7/001 using an image reference approach

Abstract

A method of performing inspection alignment point selection for semiconductor devices includes importing, with a computer device, one or more semiconductor design files corresponding to an area of a semiconductor die; aligning a design taken from the one or more semiconductor design files with an image taken from a die of a semiconductor wafer; and selecting an alignment point and recording a portion of the design file corresponding to the alignment point as a master reference image.

Claims

1. A method of performing inspection alignment point selection for semiconductor devices, the method comprising:

importing, with a computer device, one or more semiconductor design files corresponding to an area of a semiconductor die;

aligning a design taken from the one or more semiconductor design files with an image taken from a die of a semiconductor wafer;

selecting an alignment point and recording a portion of the design file corresponding to the alignment point as a master reference image;

obtaining additional images from additional die of the semiconductor wafer;

comparing the additional images to the master reference image to determine a quality score for the master reference image; and

selecting a new alignment point and recording a new portion of the design file corresponding to the new alignment point as a new master reference image in the event the quality score for the master reference image is deemed insufficient.

2. The method of claim 1, further comprising, upon obtaining a sufficient quality score for the master reference image, performing inspection of additional semiconductor wafers.

3. The method of claim 1, wherein the alignment point is selected using either the wafer image or the corresponding imported design.

4. The method of claim 1, wherein the image taken from the die of the semiconductor wafer comprises an electron beam (e-beam) image taken from an e-beam imaging tool.

5. A method of performing inspection alignment of semiconductor devices, the method comprising:

aligning, with an inspection tool, an image of a wafer under inspection in a region of an alignment point with a master reference image, wherein the master reference image is predetermined by importing one or more semiconductor design files corresponding to an area of a semiconductor die, aligning a design taken from the one or more semiconductor design files with an image taken from a die of a previously scanned wafer, and selecting an alignment point and recording a portion of the design file corresponding to the alignment point as the master reference image; and

finding a best match between the master reference image and the image of the wafer under inspection so as to identify the alignment point on the wafer under inspection;

wherein the predetermining of the master reference image further comprises obtaining additional images from additional die of the previously scanned wafer and comparing the additional images to the master reference image to determine a quality score for the master reference image; and

selecting a new alignment point and recording a new portion of the image corresponding to the new alignment point as a new master reference image in the event the quality score for the master reference image is deemed insufficient.

6. The method of claim 5, further comprising applying a filtering algorithm to the master reference image and the image of the wafer under inspection prior to finding the best match.

7. The method of claim 6, wherein the filtering algorithm comprises one or more of a smoothing algorithm and an edge detection algorithm.

8. The method of claim 5, further comprising identifying multiple alignment points on the wafer under inspection and using the multiple alignment points to align the wafer under inspection so as to determine an exact location of die origin for each die on the wafer under inspection.

9. A non-transitory, computer readable medium having instructions stored thereon that, when executed by a computer, implement a method of performing inspection alignment of semiconductor devices, the method comprising:

aligning an image of a wafer under inspection in a region of an alignment point with a master reference image, wherein the master reference image is predetermined by importing one or more semiconductor design files corresponding to an area of a semiconductor die, aligning a design taken from the one or more semiconductor design files with an image taken from a die of a previously scanned wafer, and selecting an alignment point and recording a portion of the design file corresponding to the alignment point as the master reference image; and

finding a best match between the master reference image and the image of the wafer under inspection so as to identify the alignment point on the wafer under inspection;

wherein the predetermining of the master reference image further comprises obtaining additional images from additional die of the previously scanned wafer and comparing the additional images to the master reference image to determine a quality score for the master reference image; and

selecting a new alignment point and recording a new portion of the image corresponding to the new alignment point as a new master reference image in the event the quality score for the master reference image is deemed insufficient.

10. The computer readable medium of claim 9, wherein the method further comprises applying a filtering algorithm to the master reference image and the image of the wafer under inspection prior to finding the best match.

11. The computer readable medium of claim 10, wherein the filtering algorithm comprises one or more of a smoothing algorithm and an edge detection algorithm.

12. The computer readable medium of claim 9, wherein the method further comprises identifying multiple alignment points on the wafer under inspection and using the multiple alignment points to align the wafer under inspection so as to determine an exact location of die origin for each die on the wafer under inspection.

13. A system for performing inspection alignment of semiconductor devices, comprising:

a computer device in communication with an inspection tool;

the inspection tool configured to align an image of a wafer under inspection in a region of an alignment point with a master reference image, wherein the master reference image is predetermined by importing one or more semiconductor design files corresponding to an area of a semiconductor die, aligning a design taken from the one or more semiconductor design files with an image taken from a die of a previously scanned wafer, and selecting an alignment point and recording a portion of the design file corresponding to the alignment point as a master reference image; and

the computer device configured to find a best match between the master reference image and the image of the wafer under inspection so as to identify the alignment point on the wafer under inspection;

wherein the predetermining of the master reference image further comprises obtaining additional images from additional die of the previously scanned wafer and comparing the additional images to the master reference image to determine a quality score for the master reference image; and

selecting a new alignment point and recording a new portion of the image corresponding to the new alignment point as a new master reference image in the event the quality score for the master reference image is deemed insufficient.

14. The system of claim 13, wherein the computer device is configured to apply a filtering algorithm to the master reference image and the image of the wafer under inspection prior to finding the best match.

15. The system of claim 14, wherein the filtering algorithm comprises one or more of a smoothing algorithm and an edge detection algorithm.

16. The system of claim 13, wherein the computer device is configured to identify multiple alignment points on the wafer under inspection and use the multiple alignment points to align the wafer under inspection so as to determine an exact location of die origin for each die on the wafer under inspection.