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Intelligent data storage and processing using FPGA devices

  • US 8,751,452 B2
  • Filed: 01/06/2012
  • Issued: 06/10/2014
  • Est. Priority Date: 05/23/2003
  • Status: Active Grant
First Claim
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1. A data processing apparatus comprising:

  • a processing device for communicating with a computer system to offload a plurality of processing tasks from a processor within the computer system, wherein the processing device comprises a re-configurable logic device;

    wherein the re-configurable logic device is configured to receive and process streaming data through a multi-functional pipeline deployed on the re-configurable logic device;

    wherein the multi-functional pipeline comprises a plurality of pipelined data processing engines, each pipelined data processing engine being configured to (1) receive streaming data and perform a processing operation on the received streaming data, and (2) be responsive to a control instruction that defines whether that pipelined data processing engine is an activated data processing engine or a deactivated data processing engine, wherein an activated data processing engine is configured to perform the processing operation of that activated data processing engine on any received streaming data, and wherein a deactivated data processing engine remains in the pipeline but does not perform the processing operation of that deactivated data processing engine on any received streaming data, the multi-functional pipeline thereby being configured to provide a plurality of different pipeline functions in response to control instructions that are configured to selectively activate and deactivate the pipelined data processing engines, each pipeline function being the combined functionality of each activated pipelined data processing engine in the pipeline at a given time; and

    wherein the pipelined data processing engines comprise a data reduction engine.

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