Methods and apparatus related to flow control within a data center switch fabric

• US 8,755,396 B2
• Filed: 06/30/2009
• Issued: 06/17/2014
• Est. Priority Date: 09/11/2008
• Status: Expired due to Fees

• Current Assignee: Juniper Networks Incorporated
• Original Assignee: Juniper Networks Incorporated
• Inventors: Sindhu, Pradeep, Aybay, Gunes, Frailong, Jean-Marc, Venkatramani, Anjan, Vohra, Quaizar
• Primary Examiner(s): Lai, Andrew
• Assistant Examiner(s): LEE, ANDREW CHUNG CHEUNG
• Application Number:
  US12/495,361
• Publication Number:
  US 20100061241A1
• Time in Patent Office: 1,813 Days
• Field of Search: 370/235, 370/254, 370/363, 370/386, 370/387, 370/389, 370/390, 370/392, 370/393, 370/394, 370/395.1, 370/400, 370/401, 370/442, 370/495, 709/217
• US Class Current: 370/412
• CPC Class Codes: H04L 47/10 Flow control; Congestion control
• CPC Class Codes: H04L 47/127 by using congestion prediction
• CPC Class Codes: H04L 47/26 using explicit feedback to the source, e.g. choke packets
• CPC Class Codes: H04L 49/00 Packet switching elements
• CPC Class Codes: H04L 49/1515 Non-blocking multistage, e.g. Clos
• CPC Class Codes: H04L 49/356 for storage area networks
• CPC Class Codes: H04L 49/505 Corrective measures
• CPC Class Codes: H04L 49/508 Head of Line Blocking Avoidance
• CPC Class Codes: H04L 49/90 Buffering arrangements
• CPC Class Codes: H04L 49/901 using storage descriptor, e.g. read or write pointers
• CPC Class Codes: H04L 49/9057 Arrangements for supporting packet reassembly or resequencing

Abstract

In one embodiment, an apparatus includes a switch core that has a multi-stage switch fabric physically distributed among a set of chassis. The multi-stage switch fabric has a set of input buffers and a set of output ports. The switch core can be configured to be coupled to a set of edge devices. The apparatus can also include a controller implemented in hardware without software during operation and with software during configuration and monitoring. The controller can be coupled to the set of input buffers and the set of output ports. The controller can be configured to send a flow control signal to an input buffer from the set of input buffers when congestion at an output port from the set of output ports is predicted and before congestion in the switch core occurs.

Claims

1. An apparatus, comprising;

a switch core having a multi-stage switch fabric physically distributed among a plurality of chassis, a switch module associated with a first stage of the multi-stage switch fabric and not associated with a second stage of the multi-stage switch fabric and being physically located in a first chassis from the plurality of chassis, a switch module associated with the second stage and not associated with the first stage and being physically located in a second chassis from the plurality of chassis mutually exclusive from the first chassis, the multi-stage switch fabric having a plurality of input buffers and a plurality of output ports, the switch core configured to be coupled to a plurality of edge devices; and

a controller implemented in hardware without software during operation and with software during configuration and monitoring, the controller coupled to the plurality of input buffers and the plurality of output ports, the controller configured to send a flow control signal to an input buffer from the plurality of input buffers when congestion at an output port from the plurality of output ports is predicted and before congestion in the switch core occurs.

2. The apparatus of claim 1, wherein the controller is configured to perform end-to-end flow control for the input buffer and the output port independent of intrafabric flow control for the multi-stage switch fabric of the switch core.

3. The apparatus of claim 1, wherein the controller is configured to perform end-to-end flow control for the input buffer and the output port independent of flow control for the plurality of edge devices.

4. The apparatus of claim 1, further comprising:

a plurality of peripheral processing devices configured to be coupled to the plurality of edge devices,

the controller is configured to perform end-to-end flow control for the input buffer and the output port independent of flow control for the plurality of edge devices.

5. The apparatus of claim 1, wherein the controller is configured to perform end-to-end flow control on cells buffered at the input buffer for a time before being sent to the output port through the multi-stage switch fabric, the time being associated with the end-to-end flow control.

6. The apparatus of claim 1, wherein the controller is configured to perform end-to-end flow control on for cells buffered at the input buffer independent of cell segments buffered at a stage of the multi-stage switch fabric and independent of packets buffered at an edge device from the plurality of edge devices.

7. The apparatus of claim 1, wherein the controller is configured to perform end-to-end flow control on for cells buffered at the input buffer independent of flow control mechanisms associated with Ethernet.

8. An apparatus, comprising;

a switch core having a multi-stage switch fabric physically distributed among a plurality of chassis, a switch module associated with a first stage of the multi-stage switch fabric being physically located in a first chassis from the plurality of chassis, a switch module associated with a second stage of the multi-stage switch fabric being physically located in a second chassis from the plurality of chassis physically distinct from the first chassis, the multi-stage switch configured to receive a plurality of cells associated with a packet and configured to switch a plurality of cell segments based on the plurality of cells; and

a controller coupled to the switch core, the controller configured to perform flow control signal for the plurality of cells independent of flow control for the plurality of cell segments.

9. The apparatus of claim 8, wherein:

the controller is implemented in hardware without software during operation and with software during configuration and monitoring.

10. The apparatus of claim 8, wherein:

the multi-stage switch fabric has a plurality of input buffers and a plurality of output ports,

the controller is configured to send a flow control signal to an input buffer from the plurality of input buffers when congestion at an output port from the plurality of output ports is predicted and before congestion in the switch core occurs.

11. The apparatus of claim 8, wherein:

the multi-stage switch fabric has a plurality of input buffers and a plurality of output ports,

the controller is configured to perform end-to-end flow control for an input buffer from the plurality of input buffers and an output port from the plurality of output buffers independent of intrafabric flow control for the multi-stage switch fabric of the switch core.

12. The apparatus of claim 8, wherein:

the multi-stage switch fabric has a plurality of input buffers and a plurality of output ports,

the controller is configured to perform end-to-end flow control for an input buffer from the plurality of input buffers and an output port from the plurality of output buffers independent of flow control for the plurality of edge devices.

13. The apparatus of claim 8, further comprising:

a plurality of peripheral processing devices configured to be coupled to the plurality of edge devices,

the multi-stage switch fabric has a plurality of input buffers and a plurality of output ports,

the controller is configured to perform end-to-end flow control for an input buffer from the plurality of input buffers and an output port from the plurality of output buffers independent of flow control for the plurality of edge devices.

14. The apparatus of claim 8, wherein:

the multi-stage switch fabric has a plurality of input buffers and a plurality of output ports,

the controller is configured to perform end-to-end flow control on for cells buffered at an input buffer from the plurality of input buffers independent of flow control mechanisms associated with Ethernet.

15. An apparatus, comprising;

a switch core having a multi-stage switch fabric physically distributed among a plurality of chassis, a switch module associated with a first stage of the multi-stage switch fabric and not associated with a second stage of the multi-stage switch fabric and being physically located in a first chassis from the plurality of chassis, a switch module associated with the second stage and not associated with the first stage and being physically located in a second chassis from the plurality of chassis physically separate from the first chassis, the multi-stage switch fabric configured to receive a plurality of cells associated with a packet and configured to switch a plurality of cell segments based on the plurality of cells;

a plurality of edge device coupled to the switch core, an edge device from the plurality of edge devices configured to receive the packet, the edge device configured to send the plurality of cells to the multi-stage switch fabric; and

a controller coupled to the multi-stage switch fabric, the controller configured to perform flow control for the plurality of cells independent of flow control for the plurality of edge devices and intrafabric flow control for the multi-stage switch fabric.

16. The apparatus of claim 15, wherein:

the controller is implemented in hardware without software during operation and with software during configuration and monitoring.

17. The apparatus of claim 15, wherein:

the multi-stage switch fabric has a plurality of input buffers and a plurality of output ports,

the controller is configured to send a flow control signal to an input buffer from the plurality of input buffers when congestion at an output port from the plurality of output ports is predicted and before congestion in the switch core occurs.

18. The apparatus of claim 15, wherein:

the multi-stage switch fabric has a plurality of input buffers and a plurality of output ports,

the controller is configured to perform end-to-end flow control on for cells from the plurality of cells buffered at an input buffer from the plurality of input buffers independent of flow control mechanisms associated with Ethernet.