Systems and methods for efficient feature extraction accuracy using imperfect extractors

• US 8,755,606 B2
• Filed: 12/16/2011
• Issued: 06/17/2014
• Est. Priority Date: 12/16/2011
• Status: Active Grant

• Current Assignee: Harris Corporation (L3Harris Technologies, Inc.)
• Original Assignee: Harris Corporation (L3Harris Technologies, Inc.)
• Inventors: Yates, J. Harlan, Rahmes, Mark, McGonagle, Michael, Faulkner, Timothy B.
• Primary Examiner(s): Repko, Jason M
• Assistant Examiner(s): PERLMAN, DAVID S
• Application Number:
  US13/327,952
• Publication Number:
  US 20130156323A1
• Time in Patent Office: 914 Days
• Field of Search: None
• US Class Current: 382/195
• CPC Class Codes: G06T 17/05 Geographic models
• CPC Class Codes: G06T 2200/24 involving graphical user interfaces [GUIs]

Abstract

Systems (100) and methods (300) for efficient feature data analysis. The methods involve: determining a first number of screen pages needed to verify that each of a plurality of clusters of detected features comprises only detected features which were correctly identified during feature extraction/detection operations as being of the same feature class as a selected feature of an image; determining a second number of screen pages needed to verify that each of a plurality of singular detected features was correctly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image; selecting one of a plurality of different validation processes based on values of the first number of screen pages and the second number of screen pages; and performing the selected validation process to verify that each of the detected features does not constitute a false positive.

Claims

1. A method for efficient feature data analysis, comprising:

determining, by at least one electronic circuit, a first number of screen pages needed to verify that each of a plurality of clusters of detected features comprises only detected features which were correctly identified during feature extraction/detection operations as being of the same feature class as a selected feature of an image, said first number of screen pages equal to a total number of the clusters;

determining, by the electronic circuit, a second number of screen pages needed to verify that each of a plurality of singular detected features was correctly identified during feature extraction/detection operations as being of the same feature class as the selected feature of the image, said second number of screen pages equal to a reference number resulting from dividing a total number of detected features by a parallelization factor;

selecting, by the electronic circuit, one of a plurality of different validation processes based on a result of comparing a value of the first number of screen pages to a value of the second number of screen pages; and

performing the selected one of the plurality of validation processes to verify that each of the detected features was correctly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image.

2. The method according to claim 1, wherein the first and second number of screen pages are exclusively determined when spatial data for the detected features exists.

3. The method according to claim 1, wherein the selecting comprises determining if a total number of clusters of detected features is less than a reference number.

4. A method for efficient feature data analysis, comprising:

determining, by at least one electronic circuit, a first number of screen pages needed to verify that each of a plurality of clusters of detected features comprises only detected features which were correctly identified during feature extraction/detection operations as being of the same feature class as a selected feature of an image;

determining, by the electronic circuit, a second number of screen pages needed to verify that each of a plurality of singular detected features was correctly identified during feature extraction/detection operations as being of the same feature class as the selected feature of the image;

selecting, by the electronic circuit, one of a plurality of different validation processes based on values of the first number of screen pages and the second number of screen pages; and

performing the selected one of the plurality of validation processes to verify that each of the detected features was correctly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image;

wherein the selecting comprises determining if a total number of clusters of detected features is less than a reference number, where the reference number comprises a result of dividing a total number of detected features by a parallelization factor.

5. A method for efficient feature data analysis, comprising:

determining, by at least one electronic circuit a first number of screen pages needed to verify that each of a plurality of clusters of detected features comprises only detected features which were correctly identified during feature extraction/detection operations as being of the same feature class as a selected feature of an image;

determining, by the electronic circuit, a second number of screen pages needed to verify that each of a plurality of singular detected features was correctly identified during feature extraction/detection operations as being of the same feature class as the selected feature of the image;

selecting, by the electronic circuit, one of a plurality of different validation processes based on values of the first number of screen pages and the second number of screen pages; and

performing the selected one of the plurality of validation processes to verify that each of the detected features was correctly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image;

wherein the selecting comprises determining if a total number of clusters of detected features is less than a reference number, where the reference number comprises a log base two of a total number of detected features divided by a parallelization factor.

6. A method for efficient feature data analysis, comprising:

determining by at least one electronic circuit a first number of screen pages needed to verify that each of a plurality of clusters of detected features comprises only detected features which were correctly identified during feature extraction/detection operations as being of the same feature class as a selected feature of an image;

determining, by the electronic circuit, a second number of screen pages needed to verify that each of a plurality of singular detected features was correctly identified during feature extraction/detection operations as being of the same feature class as the selected feature of the image;

selecting, by the electronic circuit, one of a plurality of different validation processes based on values of the first number of screen pages and the second number of screen pages;

performing the selected one of the plurality of validation processes to verify that each of the detected features was correctly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image;

determining if a total number of clusters of detected features is less than a reference number; and

analyzing at least one cluster screen page when the total number of clusters of detected features is less than the reference number, the cluster screen page comprising a chip image including one of the plurality of clusters of detected features.

7. The method according to claim 6, further comprising adding a mark or annotation to the chip image indicating that the chip image comprises at least one detected feature which was incorrectly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image.

8. The method according to claim 6, further comprising adding a mark or annotation adjacent to at least one detected feature of the chip image indicating that the detected feature was incorrectly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image.

9. A method for efficient feature data analysis, comprising:

determining, by at least one electronic circuit, a first number of screen pages needed to verify that each of a plurality of clusters of detected features comprises only detected features which were correctly identified during feature extraction/detection operations as being of the same feature class as a selected feature of an image;

determining, by the electronic circuit, a second number of screen pages needed to verify that each of a plurality of singular detected features was correctly identified during feature extraction/detection operations as being of the same feature class as the selected feature of the image;

selecting, by the electronic circuit, one of a plurality of different validation processes based on values of the first number of screen pages and the second number of screen pages;

performing the selected one of the plurality of validation processes to verify that each of the detected features was correctly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image;

determining if a total number of clusters of detected features is less than a reference number; and

analyzing at least one features screen page when the total number of clusters of detected features is equal to or greater than the reference number, the features screen page comprising a plurality of chip images arranged in a grid format, each of the chip images including one of the detected features.

10. The method according to claim 9, further comprising adding a mark or annotation to at least one of the plurality of chip images indicating that it comprises a detected feature which was incorrectly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image.

11. The method according to claim 9, further comprising sorting the plurality of chip images based on at least one feature detection metric.

12. The method according to claim 11, further comprising identifying one of a plurality of features screen pages that comprises chip images containing detected features with feature detection metrics bracketing a given threshold value.

13. A system, comprising:

at least one electronic circuit configured to;

determine a first number of screen pages needed to verify that each of a plurality of clusters of detected features comprises only detected features which were correctly identified during feature extraction/detection operations as being of the same feature class as a selected feature of an image, the first number of screen pages equal to a total number of the clusters;

determine a second number of screen pages needed to verify that each of a plurality of singular detected features was correctly identified during feature extraction/detection operations as being of the same feature class as the selected feature of the image, the second number of screen pages equal to a reference number resulting from dividing a total number of detected features by a parallelization factor,

select one of a plurality of different validation processes based on a result of comparing a value of the first number of screen pages to a value of the second number of screen pages, and

perform the selected one of the plurality of validation processes to verify that each of the detected features was correctly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image.

14. The system according to claim 13, wherein the first and second number of screen pages are exclusively determined when spatial data for the detected features exists.

15. The system according to claim 13, wherein the electronic circuit is further configured to determine if a total number of clusters of detected features is less than a reference number.

16. A system, comprising:

at least one electronic circuit configured to;

determine a first number of screen pages needed to verify that each of a plurality of clusters of detected features comprises only detected features which were correctly identified during feature extraction/detection operations as being of the same feature class as a selected feature of an image;

determine a second number of screen pages needed to verify that each of a plurality of singular detected features was correctly identified during feature extraction/detection operations as being of the same feature class as the selected feature of the image,

select one of a plurality of different validation processes based on values of the first number of screen pages and the second number of screen pages,

perform the selected one of the plurality of validation processes to verify that each of the detected features was correctly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image; and

determine if a total number of clusters of detected features is less than a reference number, where the reference number comprises a result of dividing a total number of detected features by a parallelization factor.

17. A system, comprising:

at least one electronic circuit configured to;

determine a first number of screen pages needed to verify that each of a plurality of clusters of detected features comprises only detected features which were correctly identified during feature extraction/detection operations as being of the same feature class as a selected feature of an image;

determine a second number of screen pages needed to verify that each of a plurality of singular detected features was correctly identified during feature extraction/detection operations as being of the same feature class as the selected feature of the image,

select one of a plurality of different validation processes based on values of the first number of screen pages and the second number of screen pages, and

perform the selected one of the plurality of validation processes to verify that each of the detected features was correctly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image; and

determine if a total number of clusters of detected features is less than a reference number, where the reference number comprises a log base two of a total number of detected features divided by a parallelization factor.

18. A system, comprising:

at least one electronic circuit configured to;

determine a first number of screen pages needed to verify that each of a plurality of clusters of detected features comprises only detected features which were correctly identified during feature extraction/detection operations as being of the same feature class as a selected feature of an image;

determine a second number of screen pages needed to verify that each of a plurality of singular detected features was correctly identified during feature extraction/detection operations as being of the same feature class as the selected feature of the image,

select one of a plurality of different validation processes based on values of the first number of screen pages and the second number of screen pages, and

perform the selected one of the plurality of validation processes to verify that each of the detected features was correctly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image;

determine if a total number of clusters of detected features is less than a reference number; and

analyze at least one cluster screen page when the total number of clusters of detected features is less than the reference number, the cluster screen page comprising a chip image including one of the plurality of clusters of detected features.

19. The system according to claim 18, wherein the electronic circuit is further configured to add a mark or annotation to the chip image indicating that the chip image comprises at least one detected feature which was incorrectly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image.

20. The system according to claim 18, wherein the electronic circuit is further configured to add a mark or annotation adjacent to at least one detected feature of the chip image indicating that the detected feature was incorrectly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image.

21. A system, comprising:

at least one electronic circuit configured to;

determine a first number of screen pages needed to verify that each of a plurality of clusters of detected features comprises only detected features which were correctly identified during feature extraction/detection operations as being of the same feature class as a selected feature of an image;

determine a second number of screen pages needed to verify that each of a plurality of singular detected features was correctly identified during feature extraction/detection operations as being of the same feature class as the selected feature of the image,

select one of a plurality of different validation processes based on values of the first number of screen pages and the second number of screen pages, and

perform the selected one of the plurality of validation processes to verify that each of the detected features was correctly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image;

determine if a total number of clusters of detected features is less than a reference number; and

analyze at least one features screen page when the total number of clusters of detected features is equal to or greater than the reference number, the features screen page comprising a plurality of chip images arranged in a grid format, each of the chip images including one of the detected features.

22. The system according to claim 21, wherein the electronic circuit is further configured to add a mark or annotation to at least one of the plurality of chip images indicating that it comprises a detected feature which was incorrectly identified during the feature extraction/detection operations as being of the same feature class as the selected feature of the image.

23. The system according to claim 21, wherein the electronic circuit is further configured to sort the plurality of chip images based on at least one feature detection metric.

24. The system according to claim 23, wherein the electronic circuit is further configured to identify one of a plurality of features screen pages that comprises chip images containing detected features with feature detection metrics bracketing a given threshold value.