Methods and apparatus for improved raid parity computation in a storage controller

• US 8,756,371 B2
• Filed: 10/12/2011
• Issued: 06/17/2014
• Est. Priority Date: 10/12/2011
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: LSI Corporation (Broadcom, Inc.)
• Inventors: Hall, Randy K., Gates, Dennis E., Kloeppner, John R., El-Batal, Mohamad H., Sterns, Randolph W
• Primary Examiner(s): Verbrugge, Kevin
• Application Number:
  US13/271,397
• Publication Number:
  US 20130097376A1
• Time in Patent Office: 979 Days
• Field of Search: None
• US Class Current: 711/114
• CPC Class Codes: G06F 11/1076 Parity data used in redundant arrays of independent storages, e.g. in RAID systems
• CPC Class Codes: G06F 11/1092 Rebuilding, e.g. when physically replacing a failing disk
• CPC Class Codes: G06F 11/2094 Redundant storage or storage space G06F11/2056 takes precedence
• CPC Class Codes: G06F 12/123 with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
• CPC Class Codes: G06F 2211/1057 Parity-multiple bits-RAID6, i.e. RAID 6 implementations
• CPC Class Codes: G06F 2211/1059 Parity-single bit-RAID5, i.e. RAID 5 implementations
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0658 Controller construction arrangements
• CPC Class Codes: G06F 3/0689 Disk arrays, e.g. RAID, JBOD

Abstract

Methods and apparatus for improved calculation of redundancy information in RAID storage controllers. Features and aspects hereof provide for a firmware/software element (FPE) for generating redundancy information in combination with a custom logic circuit (HPE) designed to generate redundancy information. A scheduler element operable on a processor of a storage controller along with the FPE determines which of the FPE and HPE is best suited to rapidly complete a new redundancy computation operation and activates or queues the new operation for performance by the selected component.

Claims

1. A Redundant Array of Independent Disks (RAID) storage controller comprising:

a programmable processor programmed to process I/O requests from attached systems;

a firmware redundancy computation element operable on the programmable processor of the storage controller, the firmware redundancy computation element operable to generate redundancy information from data applied to the firmware redundancy computation element;

a redundancy computation circuit coupled with the programmable processor and operable to generate redundancy information from data applied to the redundancy computation circuit; and

a scheduler element operable on the programmable processor, the scheduler element operable to selectively utilize either the firmware redundancy computation element or the redundancy computation circuit for generating redundancy information in the storage controller based on present operating conditions of the storage controller, wherein the redundancy information is used by the controller in processing RAID storage management relating to the I/O requests.

2. The controller of claim 1

wherein the firmware redundancy computation element further comprises implementation of a plurality of redundancy computation methods, and

wherein the scheduler element is further operable to select one of the plurality of implementations of redundancy computation methods based on an alignment characteristic of the data applied to the firmware redundancy computation element.

3. The controller of claim 2

wherein each of the plurality of firmware redundancy computation methods uses a corresponding set of single instruction multiple data (SIMD) instructions.

4. The controller of claim 1 further comprising:

a memory coupled with the scheduler element and coupled with the firmware redundancy computation element and coupled with the redundancy computation circuit, the memory adapted to store a firmware queue identifying redundancy computation operations to be performed by the firmware redundancy computation element and further adapted to store a hardware queue identifying redundancy computation operations to be performed by the redundancy computation circuit,

wherein the firmware redundancy computation element is operable to generate redundancy information by performing a redundancy computation operation identified in the firmware queue,

wherein the redundancy computation circuit is operable to generate redundancy information by performing a redundancy computation operation identified in the hardware queue,

wherein the scheduler element is further operable to select the redundancy computation circuit by adding information identifying a redundancy computation in the hardware queue, and

wherein the scheduler element is further operable to select the firmware redundancy computation element by adding information identifying a redundancy computation in the firmware queue.

5. The controller of claim 4

wherein the scheduler element is further operable to determine a number of redundancy computation operations in the hardware queue,

wherein the scheduler element is further operable to add information identifying a new redundancy computation operation to the hardware queue in response a determination that the number of redundancy computation operations in the hardware queue is less than or equal to a predetermined threshold value, and

wherein the scheduler element is further operable to add information identifying the new redundancy computation operation to the firmware queue in response to a determination that the number of redundancy computation operations in the hardware queue is greater than the predetermined threshold value.

6. The controller of claim 5

wherein the predetermined threshold value is 1.

7. The controller of claim 1

wherein the programmable processor is a multi-core processor having a plurality of cores.

8. The controller of claim 7

wherein the firmware redundancy computation element is a multi-threaded element operable to use multiple of the plurality of cores to perform one or more redundancy computation operations in parallel.

9. The controller of claim 7

wherein the firmware redundancy computation element is operable on one or more dedicated cores of the plurality of cores.

10. A method operable in a Redundant Array of Independent Disks (RAID) storage controller for generating redundancy information, the storage controller having a firmware redundancy computation element operable on a programmable processor of the controller and the storage controller having a redundancy computation circuit coupled with the programmable processor, the method comprising:

generating a request to perform a redundancy computation operation based on identified data, the request comprising information identifying the computation to be performed;

selecting a selected redundancy computation component from either the firmware redundancy computation element or the redundancy computation circuit to perform the redundancy computation operation based on present operating status of the storage controller;

performing the redundancy computation operation using the selected redundancy computation component to generate redundancy information; and

using the generated redundancy information for RAID storage management functions of the storage controller.

11. The method of claim 10

wherein the storage controller has a memory adapted to store a firmware queue and a hardware queue,

wherein the step of selecting further comprises adding information identifying the redundancy computation operation to the hardware queue in response to selecting the redundancy computation circuit as the selected redundancy computation component, and

wherein the step of selecting further comprises adding information identifying the redundancy computation operation to the firmware queue in response to selecting the firmware redundancy computation element as the selected redundancy computation component.

12. The method of claim 11

wherein the step of selecting further comprises:

determining a number of redundancy computation operations in the hardware queue;

adding information identifying the redundancy computation operation to the hardware queue in response a determination that the number of redundancy computation operations in the hardware queue is less than or equal to a predetermined threshold value; and

adding information identifying the redundancy computation operation to the firmware queue in response to a determination that the number of redundancy computation operations in the hardware queue is greater than the predetermined threshold value.

13. The method of claim 12

wherein the predetermined threshold value is 1.

14. A non-transitory computer readable medium tangibly embodying programmed instructions which, when executed by a processor of a Redundant Array of Independent Disks (RAID) storage controller, perform a method for generating redundancy information, the storage controller having a firmware redundancy computation element operable on a programmable processor of the controller and the storage controller having a redundancy computation circuit coupled with the programmable processor, the method comprising:

generating a request to perform a redundancy computation operation based on identified data, the request comprising information identifying the computation to be performed;

selecting a selected redundancy computation component from either the firmware redundancy computation element or the redundancy computation circuit to perform the redundancy computation operation based on present operating status of the storage controller;

performing the redundancy computation operation using the selected redundancy computation component to generate redundancy information; and

using the generated redundancy information for RAID storage management functions of the storage controller.

15. The medium of claim 14

wherein the storage controller has a memory adapted to store a firmware queue and a hardware queue,

wherein the method step of selecting further comprises adding information identifying the redundancy computation operation to the hardware queue in response to selecting the redundancy computation circuit as the selected redundancy computation component, and

wherein the method step of selecting further comprises adding information identifying the redundancy computation operation to the firmware queue in response to selecting the firmware redundancy computation element as the selected redundancy computation component.

16. The medium of claim 15

wherein the method step of selecting further comprises:

determining a number of redundancy computation operations in the hardware queue;

adding information identifying the redundancy computation operation to the hardware queue in response a determination that the number of redundancy computation operations in the hardware queue is less than or equal to a predetermined threshold value; and

adding information identifying the redundancy computation operation to the firmware queue in response to a determination that the number of redundancy computation operations in the hardware queue is greater than the predetermined threshold value.

17. The medium of claim 16

wherein the predetermined threshold value is 1.