Patterning of submicron pillars in a memory array
First Claim
1. A method for forming a memory array, the method comprising:
- forming a conductor rail above a substrate, the conductor rail having a rail width;
forming a layer of etchable material above the conductor rail;
forming a layer of photoresist over the etchable material;
patterning and developing the photoresist to form a plurality of photoresist pillars, each photoresist pillar having a first width less than about 0.3 micron and larger than the rail width, wherein the plurality of photoresist pillars are configured with the first width to survive mechanical stresses encountered prior to an etching;
shrinking the photoresist pillars to a shrunk width smaller than the first width and substantially equal to the rail width;
etching the etchable material to form a plurality of etched pillars, wherein each etched pillar is substantially aligned with the conductor rail and has a width substantially equal to the rail width; and
forming the memory array comprising a plurality of memory cells, wherein each memory cell comprises one of the etched pillars.
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Accused Products
Abstract
Methods in accordance with the invention involve patterning and etching very small dimension pillars, such as in formation of a memory array in accordance with the invention. When dimensions of pillars become very small, the photoresist pillars used to pattern them may not have sufficient mechanical strength to survive the photoresist exposure and development process. Using methods according to the present invention, these photoresist pillars are printed and developed larger than their intended final dimension, such that they have increased mechanical strength, then are shrunk to the desired dimension during a preliminary etch performed before the etch of underlying material begins.
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Citations
21 Claims
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1. A method for forming a memory array, the method comprising:
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forming a conductor rail above a substrate, the conductor rail having a rail width; forming a layer of etchable material above the conductor rail; forming a layer of photoresist over the etchable material; patterning and developing the photoresist to form a plurality of photoresist pillars, each photoresist pillar having a first width less than about 0.3 micron and larger than the rail width, wherein the plurality of photoresist pillars are configured with the first width to survive mechanical stresses encountered prior to an etching; shrinking the photoresist pillars to a shrunk width smaller than the first width and substantially equal to the rail width; etching the etchable material to form a plurality of etched pillars, wherein each etched pillar is substantially aligned with the conductor rail and has a width substantially equal to the rail width; and forming the memory array comprising a plurality of memory cells, wherein each memory cell comprises one of the etched pillars. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for forming a monolithic three dimensional memory array, the method comprising:
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a) forming a first memory level by a method comprising; i) forming a conductor rail above a substrate, the conductor rail having a rail width; ii) forming a first etchable layer above the conductor rail; iii) forming a photoresist layer over the first etchable layer; iv) patterning and developing the photoresist layer to form photoresist pillars, each pillar having a first width larger than the rail width, wherein each pillar is configured with the first width to survive mechanical stresses encountered prior to an etching; v) shrinking the photoresist pillars until each pillar has a second width, the second width less than the first width, and wherein the second width is substantially equal to the rail width; and vi) etching the first etchable layer to form etched pillars, wherein each etched pillar is substantially aligned with the conductor rail, and has a width substantially equal to the rail width; and b) monolithically forming a second memory level above the first memory level. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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Specification