Dynamic QoS upgrading

• US 8,762,653 B2
• Filed: 10/24/2013
• Issued: 06/24/2014
• Est. Priority Date: 09/16/2010
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Biswas, Sukalpa, Chen, Hao, Wadhawan, Ruchi
• Primary Examiner(s): Chery, Mardochee
• Application Number:
  US14/062,302
• Publication Number:
  US 20140052937A1
• Time in Patent Office: 243 Days
• Field of Search: 711/149, 711/E12.001
• US Class Current: 711/149
• CPC Class Codes: G06F 13/1684 using multiple buses
• CPC Class Codes: G06F 13/1694 Configuration of memory controller to different memory types

Abstract

In an embodiment, a memory controller includes multiple ports. Each port may be dedicated to a different type of traffic. In an embodiment, quality of service (QoS) parameters may be defined for the traffic types, and different traffic types may have different QoS parameter definitions. The memory controller may be configured to schedule operations received on the different ports based on the QoS parameters. In an embodiment, the memory controller may support upgrade of the QoS parameters when subsequent operations are received that have higher QoS parameters, via sideband request, and/or via aging of operations. In an embodiment, the memory controller is configured to reduce emphasis on QoS parameters and increase emphasis on memory bandwidth optimization as operations flow through the memory controller pipeline.

Claims

1. A system comprising:

a plurality of sources of memory operations, where each source is configured to transmit memory operations and corresponding quality of service (QoS) parameters indicating a requested QoS for the corresponding memory operations; and

a memory controller coupled to the plurality of sources and configured to control access to a memory for the memory operations, wherein the memory controller comprises a plurality of queues configured to store memory operations, and wherein the memory controller is configured to arbitrate among the memory operations responsive to the QoS parameters, and wherein the memory controller is coupled to receive an upgrade QoS indication from a first source of the plurality of sources, and wherein the memory controller is configured to modify the QoS parameters of pending memory operations in the queues, and wherein the pending memory operations were received from the first source, and wherein the QoS parameters are modified responsive to receiving the upgrade QoS indication from the first source subsequent to receiving the pending memory operations, wherein the modified QoS parameter for a given pending memory operation is different from an original QoS parameter provided by the first source with the pending memory operation at a time that the pending memory operation is received from the first source, and wherein the modified QoS parameter indicates a higher level of QoS than a level of QoS indicated by the original QoS parameter provided with the pending memory operation.

2. The system as recited in claim 1 wherein the upgrade QoS indication is a new request from the first source having a QoS parameter indicating the higher level of QoS.

3. The system as recited in claim 1 wherein the upgrade QoS indication is a sideband interface.

4. The system as recited in claim 1 wherein the upgrade QoS indication includes an identifier to be compared to corresponding identifiers that accompanied the pending memory operations, wherein the memory operations to experience QoS parameter modification are identified by matching the identifier to the corresponding identifiers.

5. The system as recited in claim 4 wherein only a portion of the identifier is matched to the corresponding identifiers.

6. The system as recited in claim 1 wherein the memory controller is further configured to assign an age counter to each memory operation, and wherein the memory controller is configured modify the original QoS parameter for a given memory operation responsive to expiration of the age counter.

7. The system as recited in claim 6 wherein an initial value of the age counter for the given memory operation is determined responsive to the original QoS parameter assigned to the given memory operation by the first source.

8. A method comprising:

receiving a first memory operation in a memory controller from a first source of a plurality of sources, the first memory operation having a first QoS parameter assigned by the first source indicating a first QoS level for the first memory operation;

receiving additional memory operations from other sources of the plurality of sources, the additional memory operations having QoS parameters assigned by the other sources;

subsequent to receiving the first memory operation, receiving an upgrade QoS indication from the first source;

determining that the first QoS level is to be modified for the first memory operation pending in the memory controller subsequent to receiving the first memory operation in the memory controller and responsive to receiving the upgrade QoS indication; and

changing the first QoS parameter to indicate a modified QoS level in response to the determining, wherein the modified QoS level is an upgraded QoS level indicating a higher level of service that the first QoS parameter originally indicated at a time that the first memory operation was received in the memory controller.

9. The method as recited in claim 8 further comprising receiving a second memory operation from the first source in the memory controller, wherein the determining is responsive to a second QoS parameter corresponding to the second memory operation indicating a higher QoS level than the first QoS level.

10. The method as recited in claim 8 further comprising receiving a QoS upgrade request from the first source via an interface that is separate from a request interface on which the first memory operation is received, wherein the determining is responsive to the QoS upgrade request.

11. The method as recited in claim 8 further comprising:

assigning an age parameter to the first memory operation responsive to receiving the first memory operation;

detecting that the age parameter has expired; and

wherein the determining is responsive to the detecting.

12. The method as recited in claim 11 wherein an initial value of the age parameter is dependent on the first QoS parameter that was assigned by the first source.

13. The method as recited in claim 12 further comprising:

assigning a second age parameter to the first memory operation responsive to the detecting, wherein an initial value of the second age parameter is dependent on the modified QoS level;

detecting that the second age parameter has expired, and

changing the first QoS parameter to indicate a second modified QoS level responsive to the second age parameter expiring.

14. A memory controller comprising:

a plurality of ports, wherein the memory controller is coupled to receive memory operations on the plurality of ports from a plurality of sources, each memory operation having a quality of service (QoS) parameter indicating a requested QoS level for the memory operation; and

memory channel circuitry configured to receive the memory operations from the plurality of ports and configured to schedule each memory operation on a memory channel to which that memory operation is directed, wherein the memory channel circuitry is configured to select memory operations for scheduling at one or more of a plurality of scheduling points responsive to the QoS parameters of the memory operations, and wherein the memory channel circuitry is configured to upgrade QoS levels for one or more memory operations awaiting scheduling in the memory channel circuitry from an original QoS level assigned at a time that the one or more memory operations were received from a source of the one or more memory operations to a higher QoS level responsive to the higher QoS level being subsequently received on a first port of the plurality of ports, wherein the one or more memory operations were received on the first port prior to the higher QoS level being received on the first port.

15. The memory controller as recited in claim 14 wherein the higher QoS level is indicated responsive to receiving another memory operation on the first port having a corresponding QoS parameter indicating the higher QoS level.

16. The memory controller as recited in claim 14 wherein the first port comprises an interface on which the memory operations are transmitted and a second interface on which the higher QoS level is requested.

17. The memory controller as recited in claim 14 wherein the one or more of the plurality of scheduling points include a first scheduling point at which the memory operations from different ports of the plurality of ports are scheduled to the memory channels, and wherein the first scheduling point is responsive to the QoS parameters for each memory operation.

18. The memory controller as recited in claim 17 wherein the one or more of the plurality of scheduling points include a second scheduling point at which the memory operations are scheduled based on affinity, and wherein the second scheduling point is responsive to the QoS parameters for each read memory operation but not the QoS parameters for write operations.

19. The memory controller as recited in claim 18 wherein the QoS parameters for write operations are dropped at the second scheduling point.

20. The memory controller as recited in claim 18 wherein the one or more of the plurality of scheduling points include a third scheduling point at which one or more memory commands are synthesized from each memory operation, and wherein the third scheduling point is not responsive to the QoS parameters for the read memory operations.