Method for manufacturing group III nitride semiconductor, method for manufacturing group III nitride semiconductor light-emitting device, group III nitride semiconductor light-emitting device, and lamp

• US 8,765,507 B2
• Filed: 11/21/2008
• Issued: 07/01/2014
• Est. Priority Date: 11/29/2007
• Status: Active Grant

• Current Assignee: Toyoda Gosei Company Limited (Toyota Motor Corporation)
• Original Assignee: Toyoda Gosei Company Limited (Toyota Motor Corporation)
• Inventors: Yokoyama, Yasunori, Miki, Hisayuki
• Primary Examiner(s): SHINGLETON, MICHAEL B
• Application Number:
  US12/745,304
• Publication Number:
  US 20100301379A1
• Time in Patent Office: 2,048 Days
• Field of Search: 427/551, 427/595, 427/597, 438/45, 438/46, 438/761, 438/478, 438/507, 438/509
• US Class Current: 438/45
• CPC Class Codes: C30B 23/02 Epitaxial-layer growth
• CPC Class Codes: C30B 29/403 AIII-nitrides
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02573 Conductivity type
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49107 on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/30111 matching
• CPC Class Codes: H01L 33/007 : comprising nitride compounds
• CPC Class Codes: H01L 33/06 : within the light emitting region, e.g. quantum confinement structure or tunnel barrier

Abstract

A method for manufacturing a Group III nitride semiconductor of the present invention includes a sputtering step of forming a single-crystalline Group III nitride semiconductor on a substrate by a reactive sputtering method in a chamber in which a substrate and a Ga element-containing target are disposed, wherein said sputtering step includes respective substeps of: a first sputtering step of performing a film formation of the Group III nitride semiconductor while setting the temperature of the substrate to a temperature T1; and a second sputtering step of continuing the film formation of the Group III nitride semiconductor while lowering the temperature of the substrate to a temperature T2 which is lower than the temperature T1.

Claims

1. A method for manufacturing a Group III nitride semiconductor, comprising:

a sputtering step of forming a single-crystalline Group III nitride semiconductor on a substrate by a reactive sputtering method in a chamber in which a substrate and a Ga element-containing target are disposed, wherein

said sputtering step includes respective substeps of;

a first sputtering step of performing a film formation of the Group III nitride semiconductor while setting the temperature of the substrate to a temperature T1; and

a second sputtering step of continuing the film formation of the Group III nitride semiconductor while lowering the temperature of the substrate to a temperature T2 which is lower than the temperature T1,

further comprising;

a vacuum step of removing an oxygen layer attached to the surface of the substrate, by preparing a vacuum state in the chamber and heating the substrate to the temperature T1,

wherein said first sputtering step and second sputtering step are performed in this order following said vacuum step.

2. The method for manufacturing a Group III nitride semiconductor according to claim 1, wherein the temperature T1 of the substrate is within a range of 800°

C. to 1,100°

C. in said first sputtering step, and the temperature T2 of the substrate is within a range of 700°

C. to 1,000°

C. in said second sputtering step.

3. The method for manufacturing a Group III nitride semiconductor according to claim 1, wherein the temperatures T1 and T2 of the substrate satisfy a relationship represented by a following formula:

{20°

C.≦

(T1−

T2)≦

300°

C.}.

4. The method for manufacturing a Group III nitride semiconductor according to claim 1, wherein the temperatures T1 and T2 of the substrate satisfy a relationship represented by a following formula:

{50°

C.≦

(T1−

T2)≦

200°

C.}.

5. The method for manufacturing a Group III nitride semiconductor according to claim 1, wherein a film of the Group III nitride semiconductor with a thickness t1 within a range of 5 to 100 nm is formed in said first sputtering step, and then a film of the Group III nitride semiconductor with a thickness t2 of 10 nm or more is formed in said second sputtering step.

6. The method for manufacturing a Group III nitride semiconductor according to claim 1, wherein the Group III nitride semiconductor is subjected to the film formation in a gas atmosphere having a nitrogen atom-containing gas and an inert gas in said first sputtering step and second sputtering step.

7. The method for manufacturing a Group III nitride semiconductor according to claim 6, wherein the nitrogen atom-containing gas is a nitrogen gas (N₂), and the inert gas is an argon gas (Ar).

8. The method for manufacturing a Group III nitride semiconductor according to claim 1, further comprising:

a buffer layer formation step of forming a buffer layer on the substrate by the reactive sputtering method, wherein said vacuum step, first sputtering step, and second sputtering step are performed in this order following said buffer layer formation step.

9. The method for manufacturing a Group III nitride semiconductor according to claim 8, further comprising:

a pretreatment step of subjecting a surface of the substrate to a pretreatment by a plasma treatment, wherein

said buffer layer formation step, vacuum step, first sputtering step, and second sputtering step are performed in this order following said pretreatment step.

10. A method for manufacturing a Group III nitride semiconductor light-emitting device, comprising laminating an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer in this order, each layer being comprised of a Group III nitride semiconductor, wherein

at least a part of the n-type semiconductor layer is formed by the method for manufacturing a Group III nitride semiconductor according to claim 1.

11. A method for manufacturing a Group III nitride semiconductor light-emitting device, comprising laminating an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer in this order, each layer being comprised of a Group III nitride semiconductor, wherein

the n-type semiconductor layer comprises a ground layer, and the ground layer is formed by the method for manufacturing a Group III nitride semiconductor according to claim 1.

12. A Group III nitride semiconductor light-emitting device which is obtained by the method for manufacturing a Group III nitride semiconductor light-emitting device according to claim 10.

13. A lamp comprising the Group III nitride semiconductor light-emitting device according to claim 12.