Deposit/etch for tapered oxide
First Claim
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1. A method of forming a tapered field plate dielectric region in a semiconductor wafer, the method comprising:
- etching a trench in the semiconductor wafer, wherein the trench has a sidewall;
depositing a first thickness of a first insulating layer on the semiconductor wafer, including the sidewall;
etching a first amount of the first insulating layer, wherein a first upper portion of the first insulating layer adjacent to the top of the trench is removed to expose a first upper surface of the first insulating layer;
depositing a second thickness of a second insulating layer on the semiconductor wafer, wherein the second insulating layer overlaps a portion of the first insulating layer, and wherein the second insulating layer overlaps the first upper surface; and
etching a second amount of the second insulating layer, wherein a second upper portion of the second insulating layer on the sidewall of the trench is removed.
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Abstract
A process for fabricating a tapered field plate dielectric for high-voltage semiconductor devices is disclosed. The process may include depositing a thin layer of oxide, depositing a polysilicon hard mask, depositing a resist layer and etching a trench area, performing deep silicon trench etch, and stripping the resist layer. The process may further include repeated steps of depositing a layer of oxide and anisotropic etching of the oxide to form a tapered wall within the trench. The process may further include depositing poly and performing further processing to form the semiconductor device.
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Citations
13 Claims
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1. A method of forming a tapered field plate dielectric region in a semiconductor wafer, the method comprising:
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etching a trench in the semiconductor wafer, wherein the trench has a sidewall; depositing a first thickness of a first insulating layer on the semiconductor wafer, including the sidewall; etching a first amount of the first insulating layer, wherein a first upper portion of the first insulating layer adjacent to the top of the trench is removed to expose a first upper surface of the first insulating layer; depositing a second thickness of a second insulating layer on the semiconductor wafer, wherein the second insulating layer overlaps a portion of the first insulating layer, and wherein the second insulating layer overlaps the first upper surface; and etching a second amount of the second insulating layer, wherein a second upper portion of the second insulating layer on the sidewall of the trench is removed. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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