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Method for metallization or metallization and interconnection of back contact solar cells

  • US 8,766,090 B2
  • Filed: 09/28/2012
  • Issued: 07/01/2014
  • Est. Priority Date: 03/19/2012
  • Status: Active Grant
First Claim
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1. A method for metallisation and interconnection of a back-contacted back-junction silicon solar wafer, where the solar wafer has:

  • a layered stratified doped structure at least containing a back-side emitter layer and a base layer below the emitter layer which is formed into a multiplicity of alternating emitter and base regions on the back-side by locally removing rectangular equidistant sections of the emitter layer from one side to the opposite side of the wafer to expose the underlying base layer, anda front side texturing and surface passivation, and optionally an anti-reflective coating, wherein the method comprises the following process steps in successive order;

    depositing a continuous amorphous silicon layer onto the back-side of the wafer covering the multiplicity of alternating emitter and base regions,depositing a first insulation layer covering the amorphous silicon layer except for one rectilinear opening running in parallel with and located more or less directly above the centre-axis of each of the linear emitter and base regions in an interdigitated multiplicity defining an electric contact access area above each of the linear emitter and base regions of the interdigitated multiplicity of the wafer,forming the metallisation of the wafer by one of the following;

    depositing a continuous metal layer or stack of metal layers covering the first insulation layer including the contact access areas and then patterning the metal layer or stack of metal layers into one finger conductor for each emitter and base regions of the interdigitated multiplicity of the wafer, ordepositing a patterned metal layer or stack of metal layers covering the first insulation layer including the contact access areas defining one finger conductor for each emitter and base regions of the interdigitated multiplicity of the wafer,depositing a second insulation layer onto the finger conductors with a set of access openings at positions where electric contact with the underlying finger conductor is intended, andforming a via contact in each access opening in the second insulation layer in electric contact with the finger conductor lying below the access opening, and wherethe electric contact with the underlying emitter and base regions of the wafer is obtained by employing Al or an Al—

    Si alloy as the first layer of the metallisation being in contact with the amorphous silicon in the access openings in the first insulation layer, and then heating the wafer up to at least 200°

    C. to obtain a crystallisation of the amorphous silicon in-between the metallisation and silicon wafer in the access openings.

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