Semiconductor device comprising an oxide semiconductor
First Claim
1. A semiconductor device comprising:
- an oxide semiconductor layer over an insulating layer;
a first buffer layer having n-type conductivity on and in contact with the oxide semiconductor layer;
a second buffer layer having n-type conductivity on and in contact with the oxide semiconductor layer;
a source electrode layer on the first buffer layer, wherein the first buffer layer extends beyond an inner side edge of the source electrode;
a drain electrode layer on the second buffer layer, wherein the second buffer layer extends beyond an inner side edge of the drain electrode;
a gate insulating layer over the source electrode layer and the drain electrode layer, the gate insulating layer being in contact with the oxide semiconductor layer; and
a gate electrode layer over the gate insulating layer, the gate electrode layer overlapping with the oxide semiconductor layer,wherein inner side edges of the first buffer layer and the second buffer layer are tapered.
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Accused Products
Abstract
A semiconductor device having favorable electric characteristics and a manufacturing method thereof are provided. A transistor includes an oxide semiconductor layer formed over an insulating layer, a source electrode layer and a drain electrode layer which overlap with part of the oxide semiconductor layer, a gate insulating layer in contact with part of the oxide semiconductor layer, and a gate electrode layer over the gate insulating layer. In the transistor, a buffer layer having n-type conductivity is formed between the source electrode layer and the oxide semiconductor layer and between the drain electrode layer and the oxide semiconductor layer. Thus, parasitic resistance is reduced, resulting in improvement of on-state characteristics of the transistor.
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Citations
20 Claims
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1. A semiconductor device comprising:
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an oxide semiconductor layer over an insulating layer; a first buffer layer having n-type conductivity on and in contact with the oxide semiconductor layer; a second buffer layer having n-type conductivity on and in contact with the oxide semiconductor layer; a source electrode layer on the first buffer layer, wherein the first buffer layer extends beyond an inner side edge of the source electrode; a drain electrode layer on the second buffer layer, wherein the second buffer layer extends beyond an inner side edge of the drain electrode; a gate insulating layer over the source electrode layer and the drain electrode layer, the gate insulating layer being in contact with the oxide semiconductor layer; and a gate electrode layer over the gate insulating layer, the gate electrode layer overlapping with the oxide semiconductor layer, wherein inner side edges of the first buffer layer and the second buffer layer are tapered. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A semiconductor device comprising:
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an oxide semiconductor layer over an insulating layer; a first buffer layer having n-type conductivity on and in contact with the oxide semiconductor layer; a second buffer layer having n-type conductivity on and in contact with the oxide semiconductor layer; a source electrode layer on the first buffer layer, wherein the first buffer layer extends beyond an inner side edge of the source electrode; a drain electrode layer on the second buffer layer, wherein the second buffer layer extends beyond an inner side edge of the drain electrode; a gate insulating layer over the source electrode layer and the drain electrode layer, the gate insulating layer being in contact with the oxide semiconductor layer; and a gate electrode layer over the gate insulating layer, the gate electrode layer overlapping with the oxide semiconductor layer, wherein inner side edges of the first buffer layer and the second buffer layer are tapered, and wherein a surface portion of the oxide semiconductor layer between the first buffer layer and the second buffer layer is etched. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification