Methods of frequency versus temperature compensation of existing crystal oscillators

• US 8,766,736 B2
• Filed: 01/31/2011
• Issued: 07/01/2014
• Est. Priority Date: 02/01/2010
• Status: Active Grant

• Current Assignee: Tacettin Isik
• Original Assignee: Tacettin Isik
• Inventors: Isik, Tacettin
• Primary Examiner(s): Chang, Joseph
• Assistant Examiner(s): SHIN, JEFFREY M
• Application Number:
  US13/017,603
• Publication Number:
  US 20110193600A1
• Time in Patent Office: 1,247 Days
• Field of Search: 331/158, 331/176, 331/1.R, 331/175, 331/182, 331/183
• US Class Current: 331/176
• CPC Class Codes: H03L 1/026 by using a memory for digitally storing correction values H03L1/025 takes precedence
• CPC Class Codes: H03L 1/027 by using frequency conversion means which is variable with temperature, e.g. mixer, frequency divider, pulse add/substract logic circuit H03L1/023, H03L1/026 take precedence
• CPC Class Codes: H03L 7/099 concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/1974 for fractional frequency division
• CPC Class Codes: H03L 7/23 with pulse counters or frequency dividers

Abstract

Methods for compensating the existing crystal oscillator frequencies in extended temperature ranges. Utilizing existing crystal oscillators on any system design which may have quartz crystals with associated circuitry to deliver frequency or timing reference signals and increasing the accuracy of such by additional circuitry.

Claims

1. An adjustment circuit for adjusting a frequency of an output of an external crystal oscillator, the adjustment circuit comprising:

an internal resonator that includes a temperature sensor and a frequency linearization circuit that is responsive to a temperature measured by the temperature sensor;

a primary PLL coupled to the internal resonator and configured to generate an output, which has a frequency that matches a nominal frequency of the external crystal oscillator; and

a secondary PLL coupled to the primary PLL and configured to receive the output and receive a feedback from the external crystal oscillator to correct the frequency of the output from the external crystal oscillator based on the temperature.

2. The adjustment circuit of claim 1, wherein the secondary PLL includes a frequency detector, a charge pump, a filter, and a switcher, which is coupled to the external crystal oscillator.

3. The adjustment circuit of claim 1, wherein the secondary PLL is configured to correct the frequency of the output from the external crystal oscillator based on the temperature and the output from the external crystal oscillator.

4. The adjustment circuit of claim 1, wherein the frequency linearization circuit includes an external interface configured to receive an input for trimming the frequency of a reference signal generated by the frequency linearization circuit.

5. The adjustment circuit of claim 1, wherein the temperature sensor is configured to determine a temperature of the internal resonator for adjusting a frequency of a reference signal generated by the internal resonator based on the temperature, and wherein the internal resonator is configured to provide the reference signal to the first PLL.

6. The adjustment circuit of claim 5, wherein the first PLL is configured receive the reference signal from the internal resonator and adjust the frequency of the reference signal to match the nominal frequency of the external crystal oscillator.

7. The adjustment circuit of claim 5, wherein the temperature sensor is configured to generate a control signal based on the temperature sensed by the temperature sensor and transmit the control command to the linearization circuit for adjusting the frequency of the reference signal.

8. The adjustment circuit of claim 5, wherein the internal resonator includes a crystal oscillator coupled to the linearization circuit and the crystal oscillator is configured to generate the reference signal.

9. An adjustment circuit for adjusting a frequency of an output of an external crystal oscillator, the adjustment circuit comprising:

a free running internal resonator;

a temperature sensor coupled to the free running internal resonator and that includes a frequency linearization circuit that is configured to adjust a frequency of a reference signal generated by the free running internal resonator based on a temperature of the free running internal resonator sensed by the temperature sensor;

a fractional PLL coupled to the free running internal resonator and the temperature sensor, wherein;

the fractional PLL is configured to receive the reference signal generated by the free running internal resonator and frequency adjusted by the temperature sensor and the frequency linearization circuit;

the fractional PLL includes a feedback configured to receive the output of the external crystal oscillator, and

the fractional PLL is configured to generate an output that controls the frequency of the output of the external crystal oscillator based on the temperature, the output of the external crystal oscillator received at the feedback, and a free running signal received from the free running internal resonator.

10. The adjustment circuit of claim 9, wherein the fractional PLL includes a fractional divider configured to control dividing down the frequency of the output of the external crystal.

11. An adjustment circuit for adjusting a frequency of an output of an external crystal oscillator, the adjustment circuit comprising:

an internal resonator having a temperature sensor and a frequency linearization circuit that is responsive to a temperature measured by the temperature sensor;

a fractional PLL coupled to the internal resonator, wherein;

the fractional PLL is configured to divide down the frequency of the output of the external crystal oscillator to a frequency of an output of the internal resonator,

includes a feedback configured to receive the output of the external crystal oscillator, and

configured to generate an output that controls the frequency of the output of the external crystal oscillator based on the temperature.

12. The adjustment circuit of claim 11, wherein the fractional PLL includes a fractional divider configured to control dividing down the frequency of the output of the external crystal.

13. The adjustment circuit of claim 12, wherein the fractional PLL includes:

a comparator coupled to the fractional divider and configured to receive the output of the external crystal oscillator and provide a frequency signal for the output of the external crystal oscillator to the fraction divider,

a phase detector, which includes a first input coupled to an output of the fractional divider and includes a second input coupled to the output of the internal resonator,

a switcher coupled to an output of the adjustment circuit and configured to generate a control signal to control a frequency of the output of the external crystal oscillator, and

a filter coupled between an output of the phase detector and the switcher.

14. The adjustment circuit of claim 11, wherein the fractional PLL is configured to generate the output that controls the frequency of the output of the external crystal oscillator based on the temperature and based on the output of the external crystal oscillator received via the feedback.

15. The adjustment circuit of claim 14, wherein the temperature sensor is configured to determine a temperature of the internal resonator for adjusting a frequency of a reference signal generated by the internal resonator based on the temperature, and wherein the internal resonator is configured to provide the reference signal to the fractional PLL.