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Semiconductor memory device and method for inspecting the same

  • US 8,767,443 B2
  • Filed: 09/19/2011
  • Issued: 07/01/2014
  • Est. Priority Date: 09/22/2010
  • Status: Expired due to Fees
First Claim
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1. A method for inspecting a semiconductor memory device comprising a memory cell including a capacitor and a transistor, one of a source and a drain of the transistor being connected to the capacitor, and the transistor including an oxide semiconductor, the method comprising the steps of:

  • a first step of turning on the transistor to accumulate electrical charge in the capacitor;

    a second step of turning off the transistor and setting the other of the source and the drain of the transistor to a floating state after the first step; and

    a third step of applying a voltage to a gate of the transistor and measuring a potential of the other of the source and the drain of the transistor to inspect a threshold voltage of the transistor after the second step.

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