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Non-volatile memory with dynamic multi-mode operation

  • US 8,767,461 B2
  • Filed: 09/10/2013
  • Issued: 07/01/2014
  • Est. Priority Date: 02/16/2007
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • a flash memory array;

    an input to receive a request that includes a logical address;

    a translator configured to map the logical address to a corresponding physical address within the flash memory array; and

    circuitry configured to issue i) a first type of program command when the physical address is within a first subdivision of the flash memory array; and

    ii) a second different type of program command when the physical address is within a second subdivision of the flash memory array, the first subdivision being different than the second subdivision.

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