Non-volatile semiconductor memory module enabling out of order host command chunk media access

• US 8,769,232 B2
• Filed: 04/06/2011
• Issued: 07/01/2014
• Est. Priority Date: 04/06/2011
• Status: Active Grant

• Current Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Suryabudi, Dominic S., Syu, Mei-Man L.
• Primary Examiner(s): Bertram, Ryan
• Application Number:
  US13/080,800
• Publication Number:
  US 20120260020A1
• Time in Patent Office: 1,182 Days
• Field of Search: 711/103, 711/125, 711150-151, 711167-169
• US Class Current: 711/169
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays

Abstract

A non-volatile semiconductor memory module is disclosed comprising a memory device and memory controller operably coupled to the memory device, wherein the memory controller is operable to receive a host command, split the host command into one or more chunks comprising a first chunk comprising at least one logical block address (LBA), and check the first chunk against an active chunk coherency list comprising one or more active chunks to determine whether the first chunk is an independent chunk, and ready to be submitted for access to the memory device, or a dependent chunk, and deferred access to the memory device until an associated dependency is cleared.

Claims

1. A non-volatile semiconductor memory module comprising:

a memory device; and

a memory controller operably coupled to the memory device, the memory controller operable to;

receive a command from a host;

split the command into one or more chunks, the one or more chunks comprising a first chunk associated with at least one logical block address (LBA);

check the first chunk against an active chunk coherency list including entries associated with each of one or more active chunks to determine whether the first chunk overlaps one of the one or more active chunks at least in part by determining whether the first chunk accesses a same Logical Chunk Number (LCN) as one of the one or more active chunks;

when it is determined that the first chunk does not overlap one of the one or more active chunks, submit the first chunk to the memory device; and

when it is determined that the first chunk overlaps one of the one or more active chunks, store a forward dependency pointer identifying the first chunk in an entry associated with the overlapped chunk, and defer submission of the first chunk to the memory device until an associated dependency link is cleared.

2. The non-volatile semiconductor memory module as recited in claim 1, wherein the entries of the active chunk coherency list each include a state indication field indicating a state associated with the respective chunk.

3. The non-volatile semiconductor memory module as recited in claim 1, wherein the memory controller is further operable to clear the dependency link after the overlapped chunk has completed execution in the memory device.

4. The non-volatile semiconductor memory module as recited in claim 1, wherein the forward dependency pointer triggers submission of the first chunk to the memory device after the overlapped chunk has completed execution in the memory device.

5. The non-volatile semiconductor memory module as recited in claim 1, wherein the memory controller is further operable to determine that the first chunk overlaps one of the one or more active chunks when at least one LBA associated with the first chunk is the same as at least one LBA associated with the active chunk.

6. The non-volatile semiconductor memory module as recited in claim 1, wherein the memory controller comprises a buffer, and wherein the controller is further operable to store the first chunk in the buffer until the dependency link is cleared.

7. The non-volatile semiconductor memory module as recited in claim 1, wherein each of the one or more active chunks associated with entries in the active chunk coherency list have not completed execution in the memory device.

8. The non-volatile semiconductor memory module as recited in claim 1, wherein the one or more chunks further comprise a second chunk, wherein the second chunk is associated with at least one LBA, and wherein the memory controller is operable to:

determine that the second chunk does not overlap any of the one or more active chunks associated with entries in the active chunk coherency list; and

submit the second chunk to the memory device.

9. The non-volatile semiconductor memory module as recited in claim 1, wherein the memory controller is further operable to check the first chunk against the one or more active chunks associated with entries in the active chunk coherency list in order from latest to oldest active chunk until an overlapped active chunk is identified or all of the one or more active chunks have been checked.

10. The non-volatile semiconductor memory module as recited in claim 1, wherein each of the one or more active chunks associated with entries in the active chunk coherency list is associated with a previously received host command.

11. The non-volatile semiconductor memory module as recited in claim 1, wherein the first chunk has a size that corresponds to at least one programming unit of flash memory.

12. The non-volatile semiconductor memory module as recited in claim 11, wherein the at least one programming unit corresponds to a page of flash memory.

13. The non-volatile semiconductor memory module as recited in claim 1, wherein the memory device comprises a flash memory device.

14. A method of operating a non-volatile semiconductor memory module comprising a memory device, the method comprising:

receiving a command from a host;

splitting the command into one or more chunks, the one or more chunks comprising a first chunk associated with at least one logical block address (LBA);

checking the first chunk against an active chunk coherency list including entries associated with each of one or more active chunks to determine whether the first chunk overlaps one of the one or more active chunks at least in part by determining whether the first chunk accesses a same Logical Chunk Number (LCN) as one of the one or more active chunks;

when it is determined that the first chunk does not overlap one of the one or more active chunks, submitting the first chunk to the memory device; and

when it is determined that the first chunk overlaps one of the one or more active chunks, storing a forward dependency pointer identifying the first chunk in an entry associated with the overlapped chunk and deferring submission of the first chunk to the memory device until an associated dependency link is cleared.

15. The method as recited in claim 14, wherein the entries of the active chunk coherency list each include a state indication field indicating a state associated with the respective chunk.

16. The method as recited in claim 14, further comprising clearing the dependency link after the overlapped chunk has completed execution in the memory device.

17. The method as recited in claim 14, wherein the forward dependency pointer triggers submission of the first chunk to the memory device after the overlapped chunk has completed execution in the memory device.

18. The method as recited in claim 14, further comprising determining that the first chunk overlaps one of the one or more active chunks when at least one LBA associated with the first chunk is the same as at least one LBA associated with the active chunk.

19. The method as recited in claim 14, further comprising storing the first chunk in a buffer until the dependency link is cleared.

20. The method as recited in claim 14, wherein each of the one or more active chunks associated with entries in the active chunk coherency list have not completed execution in the memory device.

21. The method as recited in claim 14, wherein the one or more chunks further comprise a second chunk, wherein the second chunk is associated with at least one LBA, and further comprising:

determining that the second chunk does not overlap any of the one or more active chunks associated with entries in the active chunk coherency list; and

submitting the second chunk to the memory device.

22. The method as recited in claim 14, further comprising checking the first chunk against the one or more active chunks associated with entries in the active chunk coherency list in order from latest to oldest active chunk until an overlapped active chunk is identified or all of the one or more active chunks have been checked.

23. The method as recited in claim 14, wherein each of the one or more active chunks associated with entries in the active chunk coherency list is associated with a previously received host command.

24. The method as recited in claim 14, wherein the first chunk has a size that corresponds to at least one programming unit of flash memory.

25. The method as recited in claim 24, wherein the at least one programming unit corresponds to a page of flash memory.

26. The method as recited in claim 14, wherein the memory device comprises a flash memory device.