Semiconductor interconnect structures
First Claim
1. A semiconductor device, comprising:
- a first insulator structure;
a first conductive feature partially within the first insulator structure, the first conductive feature having a portion at least partially protruding beyond a surface of the first insulator structure;
a second insulator structure having a second conductive feature therein;
a conformal intervening layer between the first and second insulator structures, wherein the first insulator structure, intervening layer, and second insulator structure are arranged in a stack, and wherein the conformal intervening layer conforms to the protruding portion of the conductive feature of the first insulator structure; and
a conductive interconnect feature connecting the first conductive feature with the second conductive feature, the conductive interconnect feature passing through the conformal intervening layer and partially landing on the first conductive feature, wherein the unlanded portion of the conductive interconnect does not penetrate the conformal intervening layer.
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Accused Products
Abstract
Techniques are disclosed that enable improved shorting margin between unlanded conductive interconnect features and neighboring conductive features. In some embodiments, an etch may be applied to an insulator layer having one or more conductive features therein, such that the insulator layer is recessed below the top of the conductive features and the edges of the conductive features are rounded or otherwise softened. A conformal etch stop layer may then be deposited over the conductive features and the insulator material. A second insulator layer may be deposited above the conformal etch stop layer, and an interconnect feature may pass through the second insulator layer and the conformal etch stop layer to connect with the rounded portion of one of the conductive features. In some embodiments, the interconnect feature is an unlanded via and the unlanded portion of the via may or may not penetrate through the conformal barrier layer.
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Citations
23 Claims
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1. A semiconductor device, comprising:
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a first insulator structure; a first conductive feature partially within the first insulator structure, the first conductive feature having a portion at least partially protruding beyond a surface of the first insulator structure; a second insulator structure having a second conductive feature therein; a conformal intervening layer between the first and second insulator structures, wherein the first insulator structure, intervening layer, and second insulator structure are arranged in a stack, and wherein the conformal intervening layer conforms to the protruding portion of the conductive feature of the first insulator structure; and a conductive interconnect feature connecting the first conductive feature with the second conductive feature, the conductive interconnect feature passing through the conformal intervening layer and partially landing on the first conductive feature, wherein the unlanded portion of the conductive interconnect does not penetrate the conformal intervening layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A multilayer integrated circuit device, comprising:
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a first insulator structure having one or more metal features within an insulator material, the one or more metal features having a portion at least partially protruding beyond a surface of the first insulator structure, the protruding portion having rounded corners; a second insulator structure having one or more metal features embedded within an insulator material; a conformal etchstop layer between the first and second insulator structures, wherein the first insulator structure, etchstop layer, and second insulator structure are arranged in a stack; and a conductive interconnect feature connecting one of the metal features of the first insulator structure to one of the metal features of the second insulator structure, a portion of the conductive feature passing through the conformal etchstop layer and partially landing on at least one of the rounded corners of one of the metal features of the first insulator structure, wherein the unlanded portion of the conductive feature does not penetrate the conformal etchstop layer. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. A method of forming a semiconductor device, comprising:
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providing a first insulator structure having a first metal feature within an insulator material; etching the first insulator structure so as to recess the insulator material to be lower than the first metal feature and to round corners of the first metal feature; depositing a conformal etchstop layer over the etched insulator material and the rounded first metal feature; depositing a second insulator structure having a second metal feature embedded within an insulator material; and connecting the first metal feature with the second metal feature with a partially landed conductive interconnect feature, wherein the unlanded portion of the unlanded conductive interconnect feature does not penetrate the conformal etchstop layer. - View Dependent Claims (19, 20, 21, 22, 23)
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Specification