Digital driving circuits, methods and systems for liquid crystal display devices

• US 8,773,420 B2
• Filed: 01/14/2011
• Issued: 07/08/2014
• Est. Priority Date: 01/14/2010
• Status: Active Grant

• Current Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Van Ess, David, Keeser, Christopher C., Murphy, Robert L., Wright, David G.
• Primary Examiner(s): Wang, Quan-Zhen
• Assistant Examiner(s): Chow, Yuk
• Application Number:
  US13/007,014
• Publication Number:
  US 20110169814A1
• Time in Patent Office: 1,271 Days
• Field of Search: 345/45, 345/50, 345/212, 345/34, 340/324, 368/29, 324/403
• US Class Current: 345/212
• CPC Class Codes: G09G 2310/06 Details of flat display driving waveforms
• CPC Class Codes: G09G 2320/0204 Compensation of DC component across the pixels in flat panels
• CPC Class Codes: G09G 3/04 for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions
• CPC Class Codes: G09G 3/18 using liquid crystals
• CPC Class Codes: G09G 3/2014 by modulation of the duration of a single pulse during which the logic level remains constant
• CPC Class Codes: G09G 3/36 using liquid crystals
• CPC Class Codes: G09G 3/3611 Control of matrices with row and column drivers

Abstract

A method may include controlling a display device in at least first mode by varying a correlation between display driver signals applied across display segments within the display device; wherein the display driver signals vary between substantially only two levels, and a display segment is activated when an average voltage magnitude across the segment over a time period exceeds a threshold value.

Claims

1. A method comprising:

generating display driver signals that vary between only two levels, wherein the display driver signals comprise common drive signals and segment drive signals;

applying the display driver signals to opposing electrodes of a display element within a display device; and

controlling the display device in a first mode by varying a pulse density of the display driver signals applied to the opposing electrodes to select or de-select the display element and filtering the display driver signals applied to the opposing electrodes using electrical characteristics of at least a portion of the display device in the first mode to provide voltage levels at the display element to vary according to pulse density;

wherein the display element is activated in the first mode when a first average voltage magnitude across the element exceeds a first minimum average voltage over a first time period, and

varying a correlation between the common drive signals and the segment drive signals in a second mode to select or de-select the display element based on a second average voltage magnitude across the display element over a second time period,

wherein the display element is activated in the second mode when the second average voltage magnitude exceeds a second minimum average voltage over the second time period,

wherein the second average voltage magnitude exceeds the second minimum average voltage when a respective one of the common drive signals and the corresponding one of the segment drive signals are correlated and the second average voltage magnitude does not exceed the second minimum average voltage when the respective one of the common drive signals and the corresponding one of the segment drive signals are not correlated.

2. The method of claim 1,

wherein the varying the correlation between display driver signals comprises generating a plurality of common driver signals that each comprises frames of N timeslots, including one selection timeslot and N−

1 de-selection timeslots, the selection timeslot being different for each common driver signal.

3. The method of claim 2, wherein the varying the correlation between display driver signals comprises generating at least one segment driver signal comprising frames of N timeslots corresponding to the common driver signals, and wherein the display element is activated when the second average voltage magnitude between corresponding common and segment driver signals exceeds the second minimum average voltage in a timeslot.

4. The method of claim 2, further comprising:

each common driver signal repeats every frame; and

generating at least one segment driver signal comprising frames of N timeslots corresponding to the common driver signal, the segment driver signal varying a correlation to at least one common driver signals in response to display data.

5. The method of claim 1, wherein the filtering the display driver signals comprises filtering with a frequency filter that comprises at least the portion of the display device, wherein the display device is a liquid crystal display device.

6. The method of claim 1, further comprising switching between at least the first mode and a second mode in response to a mode indication.

7. The method of claim 6, wherein the second mode is a low power mode and the first mode is a higher power mode.

8. A method comprising:

generating a plurality of time division multiplexed common driver signals and segment driver signals that vary substantially between only two levels;

applying the plurality of time division multiplexed common driver signals and segment driver signals to electrodes of display elements within a display device;

in a first mode, activating a first one of the display elements by varying a pulse density of one of the common and segment driver signals connected to the first display element and filtering the driver signal to provide voltage levels across the first display element that vary according to pulse density, wherein the first display element is activated when a first average voltage magnitude across the first display element over a first time period in the first mode exceeds a first minimum average voltage; and

in a second mode,

generating common driver signals that vary according to a predetermined sequence; and

generating segment driver signals that selectively correlate with at least one common driver signal in response to display data to exceed a second minimum average voltage over a second time period;

wherein a display element is activated or not activated depending upon whether a voltage exceeds the second minimum average voltage over the second time period.

9. The method of claim 8, wherein the common and segment driver signals comprises frames, each comprising a plurality of timeslots, and the time period comprises one of the timeslot.

10. The method of claim 8, further comprising:

in the first mode,

generating common driver signals comprising variable pulse densities, and

filtering the common driver signals to generate the varying voltage levels received by the display elements, wherein the filtering the common driver signals comprises forming a frequency filter that comprises at least the portion of the display device, wherein the display device is a liquid crystal display.

11. The method of claim 8, further comprising varying a pulse density of at least one of the common driver signals or the segment driver signals in response to an intensity value.

12. A system comprising:

a plurality of programmable digital blocks coupled to display elements of a display device, wherein the plurality of programmable digital blocks are configured into the following;

a first signal generator circuit that generates control signals that vary between substantially only two levels; and

a selection driver circuit comprising a first mode that selectively couples selected controls signals to common display connection points, and selectively couples selected control signals to segment connection points in response to at least display data, wherein the selected control signals are filtered using electrical characteristics of at least a portion of the display device in the first mode to provide voltage levels at the display element to vary according to pulse density, wherein one or more of the display elements, which are each connected between a common and segment connection point, are activated when a first average voltage magnitude across the segment connection point over a first period exceeds a first minimum average voltage, wherein the selection driver circuit comprises a second mode that selectively couples selected controls signals to common display connection points, wherein the control signals selectively coupled to the common display connection points are varied according to a predetermined sequence, and selectively couples selected control signals to segment connection points, wherein the control signals selectively coupled to the segment connection points selectively correlate with at least one of the control signals selectively coupled to the common display connection points in response to at least display data to exceed a second minimum average voltage over a second time period;

wherein a display element is activated or not activated depending upon whether a voltage exceeds the second minimum average voltage over the second time period.

13. The system of claim 12, wherein the signal generator circuit generates a plurality of intensity signals that substantially do not correlate with the control signals, and wherein the signal generator circuit further comprises an intensity varying circuit that logically combines the intensity signals with signals output from the selection driver circuit.

14. The system of claim 12, wherein:

the selection driver circuit generates at least one control signal having a predetermined frequency in the first mode; and

a display structure coupled to the common and segment connection points comprises an inherent capacitance that forms at least a portion of a frequency filter, the predetermined frequency being outside a passband of the frequency filter.

15. The system of claim 12, wherein the first signal generator circuit and the selection circuit of the plurality of programmable digital logic blocks are configured with configuration data.

16. The system of claim 12, wherein a liquid crystal display is coupled to the common and segment connection points.

17. The system of claim 12, wherein the plurality of programmable digital blocks are further configured to comprise a second signal generator circuit that generates additional control signals that vary between substantially only two levels and have predetermined correlations with respect to one another.

18. The system of claim 17, wherein:

the selection driver circuit comprises;

a common section that time division multiplexes the control signals to a plurality of common connection points in the predetermined sequence, and

a segment section that time division multiplexes the control signals to a plurality of common connection points in response to the at least display data.