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Memory circuit

  • US 8,773,906 B2
  • Filed: 01/24/2012
  • Issued: 07/08/2014
  • Est. Priority Date: 01/27/2011
  • Status: Expired due to Fees
First Claim
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1. A memory circuit comprising:

  • a volatile memory; and

    a nonvolatile memory including;

    a first transistor whose channel is formed in a semiconductor layer including an oxide semiconductor, anda second transistor whose gate is electrically connected to one of a source and a drain of the first transistor,wherein the nonvolatile memory is configured to hold a data signal output from the volatile memory in a node where the one of the source and the drain of the first transistor and the gate of the second transistor are connected when an operation of the volatile memory is stopped, andwherein a booster circuit capable of increasing voltage to be applied to the gate of the first transistor is provided between the gate of the first transistor and a wiring capable of supplying power supply potential.

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