Method and apparatus for performing enhanced read and write operations in a FLASH memory system
First Claim
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1. A FLASH-based solid state storage system comprising:
- a system controller including an external communication bus interface adapted to receive WRITE requests from an external host, where each WRITE request includes a Logical Block Address (LBA) and a page of data to be stored at the LBA;
a volatile memory space accessible to the system controller;
a FLASH memory space containing a plurality of physical address locations, each physical address location being capable of storing a page of data; and
one or more communication buses coupling the system controller to the FLASH memory space,wherein the system controller is configured to maintain a logical to physical translation table in the volatile memory space, where the logical to physical translation table includes both;
(i) a first group of entries associating a LBA with a physical address location within the FLASH memory space where, for each such entry, data is stored within the physical address location within the FLASH memory space; and
(ii) a second group of entries associating a LBA with one or more data identifiers, each data identifier and each physical address location, respectively, being stored in the logical to physical translation table as a predefined plurality of bits, where;
(a) each such data identifier is associated with a specific data string such that the same data identifier may be associated with two or more distinct LBAs in the second group of entries,(b) each such data string corresponds to a specific block of data and not to any physical address location within the FLASH memory space; and
(c) no physical address location within the FLASH memory space includes stored data corresponding to any of the specific blocks of data that correspond to a data string; and
wherein the system controller is configured to respond to a WRITE request containing a data string that is associated with a data identifier by storing an entry in the second group of entries and not accessing the FLASH memory space as a result of such WRITE request, andwherein the system controller is configured to respond to a READ request for data associated with a LBA in the second group of entries by providing a specific data string associated with the data identifier associated with that LBA without accessing the FLASH memory space as a result of the READ request.
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Abstract
Methods and apparatus for enhanced READ and WRITE operations in a FLASH-based solid state storage system that includes a logical to physical translation table where the logical to physical translation table can include entries associating a logical block address with one or more data identifiers, where each data identifier is associated with a data string.
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Citations
18 Claims
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1. A FLASH-based solid state storage system comprising:
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a system controller including an external communication bus interface adapted to receive WRITE requests from an external host, where each WRITE request includes a Logical Block Address (LBA) and a page of data to be stored at the LBA; a volatile memory space accessible to the system controller; a FLASH memory space containing a plurality of physical address locations, each physical address location being capable of storing a page of data; and one or more communication buses coupling the system controller to the FLASH memory space, wherein the system controller is configured to maintain a logical to physical translation table in the volatile memory space, where the logical to physical translation table includes both; (i) a first group of entries associating a LBA with a physical address location within the FLASH memory space where, for each such entry, data is stored within the physical address location within the FLASH memory space; and (ii) a second group of entries associating a LBA with one or more data identifiers, each data identifier and each physical address location, respectively, being stored in the logical to physical translation table as a predefined plurality of bits, where; (a) each such data identifier is associated with a specific data string such that the same data identifier may be associated with two or more distinct LBAs in the second group of entries, (b) each such data string corresponds to a specific block of data and not to any physical address location within the FLASH memory space; and (c) no physical address location within the FLASH memory space includes stored data corresponding to any of the specific blocks of data that correspond to a data string; and wherein the system controller is configured to respond to a WRITE request containing a data string that is associated with a data identifier by storing an entry in the second group of entries and not accessing the FLASH memory space as a result of such WRITE request, and wherein the system controller is configured to respond to a READ request for data associated with a LBA in the second group of entries by providing a specific data string associated with the data identifier associated with that LBA without accessing the FLASH memory space as a result of the READ request. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for limiting the number of operations performed on a FLASH memory and of preventing the writing of certain blocks of data into and the reading of certain blocks of data from the FLASH memory, the method comprising the steps of:
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(a) receiving a WRITE request including an identification of a logical block address and a block of data corresponding to the block address; (b) determining whether the received block of data provided in the WRITE request corresponds to a predefined block of data; (c) if the determination step (b) indicates that the received block of data corresponds to the predefined block of data; (i) associating the received logical block address with a data identifier composed of a predefined plurality of bits, the data identifier;
(A) not corresponding to a physical address in FLASH memory and (B) providing a representation of the predefined block of data such that the same data identifier may be associated with two or more distinct logical block addresses;(ii) not writing the predefined block of data to a physical address in the FLASH memory, such that no blocks of data stored within the FLASH memory correspond to the predefined block of data, and (iii) not accessing the FLASH memory as a result of the received WRITE request;
or(d) if the determination step (b) indicates that the received block of data does not correspond to the predefined block of data;
associating the received logical block address with a physical address in the FLASH memory and writing the received block of data to the physical address in the FLASH memory;(e) receiving a READ request including an identification of a logical block address; (f) determining whether the identification of a logical block address is associated with a data identifier; and (g) if the determination step (f) indicates that the received identification of a logical block address is associated with a data identifier, returning the predefined block of data and not accessing the FLASH memory as a result of the received READ request. - View Dependent Claims (10, 11, 12, 13)
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14. A memory system for storing data in one or more FLASH memory devices, the memory system comprising:
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a system controller adapted to receive WRITE requests, each WRITE request including a logical address identifier and a set of data; and a logical to physical translation table accessible to the system controller and stored in volatile RAM memory, the logical to physical translation table including at least; a first entry associating a first logical address with a physical address in a FLASH memory space; a second entry associating a second logical address with a data identifier, each data identifier and each physical address, respectively, being stored in the logical to physical translation table as a predefined plurality of bits, where the second logical address is different from the first logical address and wherein the data identifier;
(i) represents a predefined set of data wherein the predefined set of data is not stored within any physical address in the FLASH memory space such that the same data identifier may be associated with two or more distinct logical addresses and (ii) does not correspond to any physical address within the FLASH memory space; anda third entry associating a third logical address with the data identifier, wherein the third logical address is different from the first and second logical addresses; wherein the system controller is further adapted to receive a READ request from a host device, the READ request including a logical address identifier, and to return the predefined set of data to the host device without accessing the one or more FLASH memory devices in response to the received READ request if the logical address identifier received in the READ request is one of the second or the third logical addresses. - View Dependent Claims (15, 16, 17, 18)
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Specification