Virtualization in a multi-core processor (MCP)
First Claim
1. A multi-core processor, comprising:
- a set of main processing elements each comprising a set of virtualized control threads; and
a plurality of groups of sub-processing elements associated with each of the set of main processing elements, each group of sub-processing elements of the plurality of groups of sub-processing elements receiving an independent supply voltage and an independent virtualized control thread to independently adjust the independent supply voltage and a clock frequency of the group of sub-processing elements based on computational requirements of a workload forwarded from a main processing element of the set of main processing elements to the group of sub-processing elements and receiving a second independent supply voltage and a second independent virtualized control thread to independently readjust the independent supply voltage and the clock frequency of the group of sub-processing elements based on different computational requirements of a second workload forwarded from the main processing element to the group of sub-processing elements.
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Abstract
This invention describes an apparatus, computer architecture, method, operating system, compiler, and application program products for MPEs as well as virtualization in a symmetric MCP. The disclosure is applied to a generic microprocessor architecture with a set (e.g., one or more) of controlling elements (e.g., MPEs) and a set of groups of sub-processing elements (e.g., SPEs). Under this arrangement, MPEs and SPEs are organized in a way that a smaller number MPEs control the behavior of a group of SPEs. The apparatus enables virtualized control threads within MPEs to be assigned to different groups of SPEs for controlling the same. The apparatus further includes a MCP coupled to a power supply coupled with cores to provide a supply voltage to each core (or core group) and controlling-digital elements and multiple instances of sub-processing elements.
48 Citations
20 Claims
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1. A multi-core processor, comprising:
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a set of main processing elements each comprising a set of virtualized control threads; and a plurality of groups of sub-processing elements associated with each of the set of main processing elements, each group of sub-processing elements of the plurality of groups of sub-processing elements receiving an independent supply voltage and an independent virtualized control thread to independently adjust the independent supply voltage and a clock frequency of the group of sub-processing elements based on computational requirements of a workload forwarded from a main processing element of the set of main processing elements to the group of sub-processing elements and receiving a second independent supply voltage and a second independent virtualized control thread to independently readjust the independent supply voltage and the clock frequency of the group of sub-processing elements based on different computational requirements of a second workload forwarded from the main processing element to the group of sub-processing elements. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A processing system, comprising:
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a main processing element; a group of sub-processing elements; and a virtualized control thread associating each of the main processing elements with the associated group of sub-processing elements, the virtualized control thread being independent from any other virtualized control thread to enable independent controlling of the group of sub-processing elements, wherein each group of sub-processing elements of the plurality of groups of sub-processing elements receives an independent supply voltage, which is controlled by an associated control thread, by adjusting a power supply and a clock frequency to the group of sub-processing elements based on computational requirements of a workload forwarded from a main processing element of the set of main processing elements to the group of sub-processing elements and receiving a second independent supply voltage and a second independent virtualized control thread to independently readjust the independent supply voltage and the clock frequency of the group of sub-processing elements based on different computational requirements of a second workload forwarded from the main processing element to the group of sub-processing elements. - View Dependent Claims (10, 11, 12, 13)
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14. A processing method, comprising:
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associating a set of main processing elements with a set of groups of sub-processing elements using a set of independent virtualized control threads, wherein each group of sub-processing elements of the plurality of groups of sub-processing elements receives an independent supply voltage, which is controlled by an associated control thread, by adjusting a power supply and a clock frequency to the group of sub-processing elements based on computational requirements of a workload forwarded from a main processing element of the set of main processing elements to the group of sub-processing elements and receiving a second independent supply voltage and a second independent virtualized control thread to independently readjust the independent supply voltage and the clock frequency of the group of sub-processing elements based on different computational requirements of a second workload forwarded from the main processing element to the group of sub-processing elements; and independently controlling each of the set of groups of sub-processing elements using the set of independent virtualized control threads. - View Dependent Claims (15, 16, 17, 18, 19)
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20. A method for deploying a processing system, comprising:
providing a multi-core processor comprising; a set of main processing elements each comprising a set of virtualized control threads; and a plurality of groups of sub-processing elements associated with each of the set of main processing elements, each group of sub-processing elements of the plurality of groups of sub-processing elements receiving an independent supply voltage and an independent virtualized control thread to independently adjust the independent supply voltage and a clock frequency of the group of sub-processing elements based on computational requirements of a workload forwarded from a main processing element of the set of main processing elements to the group of sub-processing elements and receiving a second independent supply voltage and a second independent virtualized control thread to independently readjust the independent supply voltage and the clock frequency of the group of sub-processing elements based on different computational requirements of a second workload forwarded from the main processing element to the group of sub-processing elements.
Specification