Data recovery for defective word lines during programming of non-volatile memory arrays
First Claim
1. A method of operating a memory system including an array of flash memory cells formed along a plurality of word lines each capable of storing one or more pages of data, the method comprising:
- receiving a first data page;
storing the received first data page in a first buffer;
writing the first data page from the first buffer into a corresponding word line of the flash memory;
generating a page of parity data for the received first page of data;
storing the page of parity data in a second buffer;
subsequent to receiving the first data page, sequentially receiving one or more additional pages of data, and for each of additional received page of data;
overwriting the preceding page of received data in the first buffer therewith;
writing the page of data from the first buffer into a corresponding word line of the flash memory; and
updating the page of parity data stored in the second buffer as a function of parity data as previously stored in the second buffer and the additional received page of data;
subsequently determining whether the first data page and the additional pages of data were written correctly; and
in response to determining that one of the data pages is written incorrectly, determining the correct data for the incorrectly written page based upon the page of parity data and the first and additional data pages as read from the array.
2 Assignments
0 Petitions
Accused Products
Abstract
The recovery of data during programming, such as in the case of a broken word-line, is considered. The arrangement described assumes that k pages may be corrupted when the system finishes programming a block. Then these corrupted pages can be recovered using an erasure code. In order to recover any k pages, the system will compute and temporarily store k parity pages in the controller. These k parity pages may be computed on-the-fly as the data pages are received from the host. After programming the block if a problem is detected in a post-write read, and data in up to k pages is corrupt on some bad word-lines, then the missing data is recovered using the k parity pages that are stored in the controller and using the other non-corrupted pages that are read from the block of the memory array and decoded.
-
Citations
31 Claims
-
1. A method of operating a memory system including an array of flash memory cells formed along a plurality of word lines each capable of storing one or more pages of data, the method comprising:
-
receiving a first data page; storing the received first data page in a first buffer; writing the first data page from the first buffer into a corresponding word line of the flash memory; generating a page of parity data for the received first page of data; storing the page of parity data in a second buffer; subsequent to receiving the first data page, sequentially receiving one or more additional pages of data, and for each of additional received page of data; overwriting the preceding page of received data in the first buffer therewith; writing the page of data from the first buffer into a corresponding word line of the flash memory; and updating the page of parity data stored in the second buffer as a function of parity data as previously stored in the second buffer and the additional received page of data; subsequently determining whether the first data page and the additional pages of data were written correctly; and in response to determining that one of the data pages is written incorrectly, determining the correct data for the incorrectly written page based upon the page of parity data and the first and additional data pages as read from the array. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
-
-
20. In a non-volatile memory system including a memory circuit, the memory circuit having an array of non-volatile memory cells formed along a plurality of word lines each capable of storing one or more pages of data, and a controller circuit controlling the transfer of data between the memory system and a host and managing the storage of data on the memory circuit, a method of operating the memory system, comprising:
-
performing a write operation of a plurality of pages of data into the memory array, including; receiving from a host the plurality of pages of data at the controller circuit; computing a data check result from the plurality of pages of data wherein the data check result is a many to one transformation such that plurality of data pages cannot be reconstructed based solely upon the data check result; transferring the plurality of pages of data from the controller circuit to the memory circuit; writing the plurality of pages of data into array; discarding by the controller of one or more of the pages; and subsequent to writing the plurality of pages of data into the array, performing a post-write verify operation to determine whether the plurality of pages of data were correctly written, wherein the post-write verify operation is performed as part of the write operation independently of a separate host command therefor; and in response to determining that a first of the plurality of pages of data is not written correctly, the determined incorrectly written page being one of the pages discarded by the controller, reading one or more of the other data pages from the memory array and reconstructing the first page from the data check result and the other data pages read from the memory array. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31)
-
Specification