Semiconductor device and manufacturing method thereof
First Claim
1. A semiconductor device comprising:
- a first insulating layer;
a trench in the first insulating layer;
an oxide semiconductor layer in contact with an inner wall surface of the trench;
a gate insulating layer adjacent to the oxide semiconductor layer;
a gate electrode in the trench and adjacent to the oxide semiconductor layer with the gate insulating layer interposed therebetween; and
a source electrode or a drain electrode over and electrically connected with the oxide semiconductor layer,wherein a portion of the gate electrode is over the source electrode or the drain electrode.
1 Assignment
0 Petitions
Accused Products
Abstract
A conventional DRAM needs to be refreshed at an interval of several tens of milliseconds to hold data, which results in large power consumption. In addition, a transistor therein is frequently turned on and off; thus, deterioration of the transistor is also a problem. These problems become significant as the memory capacity increases and transistor miniaturization advances. A transistor is provided which includes an oxide semiconductor and has a trench structure including a trench for a gate electrode and a trench for element isolation. Even when the distance between a source electrode and a drain electrode is decreased, the occurrence of a short-channel effect can be suppressed by setting the depth of the trench for the gate electrode as appropriate.
-
Citations
32 Claims
-
1. A semiconductor device comprising:
-
a first insulating layer; a trench in the first insulating layer; an oxide semiconductor layer in contact with an inner wall surface of the trench; a gate insulating layer adjacent to the oxide semiconductor layer; a gate electrode in the trench and adjacent to the oxide semiconductor layer with the gate insulating layer interposed therebetween; and a source electrode or a drain electrode over and electrically connected with the oxide semiconductor layer, wherein a portion of the gate electrode is over the source electrode or the drain electrode. - View Dependent Claims (2, 3, 4)
-
-
5. A semiconductor device comprising:
-
a first insulating layer; a first trench in the first insulating layer; an oxide semiconductor layer in contact with the first insulating layer, wherein the oxide semiconductor layer comprising; a first region adjacent to a first side wall of the first trench; a second region adjacent to a bottom surface of the first trench; and a third region adjacent to a second side wall of the first trench, the first side wall of the first trench being opposite to the second side wall of the first trench; a source electrode over a first region of the first insulating layer, the source electrode being electrically connected with the oxide semiconductor layer; a drain electrode over a second region of the first insulating layer, the drain electrode being electrically connected with the oxide semiconductor layer, wherein the first trench is located between the first region of the first insulating layer and the second region of the first insulating layer; a gate insulating layer adjacent to the oxide semiconductor layer; and a gate electrode in the first trench and adjacent to the oxide semiconductor layer with the gate insulating layer interposed therebetween, wherein a portion of the gate electrode is over the source electrode or the drain electrode. - View Dependent Claims (6, 7, 8)
-
-
9. A semiconductor device comprising:
-
a first insulating layer; a first trench in the first insulating layer; a second trench in the first insulating layer; an oxide semiconductor layer in contact with an inner wall surface of the first trench; a second insulating layer adjacent to the oxide semiconductor layer, wherein the second insulating layer is adjacent to an inner wall surface of the second trench; a gate electrode in the first trench and adjacent to the oxide semiconductor layer with the second insulating layer interposed therebetween; and a third insulating layer filling the second trench, wherein a top surface of the gate electrode and a top surface of the third insulating layer are aligned. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
-
-
17. A semiconductor device comprising:
-
a semiconductor substrate; a first trench in the semiconductor substrate; an impurity region in the semiconductor substrate; a first gate insulating layer in contact with an inner wall surface of the first trench; a first gate electrode in the first trench and over the first gate insulating layer; a first insulating layer over the first gate electrode and the semiconductor substrate; a second insulating layer over the first insulating layer; a second trench in the second insulating layer; an oxide semiconductor layer in contact with an inner wall surface of the second trench; a third insulating layer adjacent to the oxide semiconductor layer; and a second gate electrode in the second trench and adjacent to the oxide semiconductor layer with the third insulating layer interposed therebetween. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24)
-
-
25. A semiconductor device comprising:
-
a circuit comprising a transistor comprising a semiconductor material; and a memory over and electrically connected to the circuit, the memory comprising; a first insulating layer; a first trench in the first insulating layer; an oxide semiconductor layer in contact with an inner wall surface of the first trench; a second insulating layer adjacent to the oxide semiconductor layer; and a gate electrode in the first trench and adjacent to the oxide semiconductor layer with the second insulating layer interposed therebetween, wherein the semiconductor material is different from a material of the oxide semiconductor layer. - View Dependent Claims (26, 27, 28, 29, 30, 31, 32)
-
Specification