Semiconductor device and method for manufacturing the same

• US 8,785,929 B2
• Filed: 06/25/2013
• Issued: 07/22/2014
• Est. Priority Date: 01/23/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Sakata, Junichiro, Shimazu, Takashi, Ohara, Hiroki, Sasaki, Toshinari, Yamazaki, Shunpei
• Primary Examiner(s): Such, Matthew W
• Assistant Examiner(s): Harrison, Monica D
• Application Number:
  US13/926,276
• Publication Number:
  US 20130285052A1
• Time in Patent Office: 392 Days
• Field of Search: 257/43
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/16 including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An object is to provide a semiconductor device including a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics. An oxide semiconductor layer including SiO_x is used in a channel formation region, and in order to reduce contact resistance with source and drain electrode layers formed using a metal material with low electric resistance, source and drain regions are provided between the source and drain electrode layers and the oxide semiconductor layer including SiO_x. The source and drain regions are formed using an oxide semiconductor layer which does not include SiO_x or an oxynitiride film.

Claims

1. A semiconductor device comprising:

a gate electrode;

an oxide semiconductor layer adjacent to the gate electrode;

an insulating layer between the gate electrode and the oxide semiconductor layer;

a source electrode electrically connected to the oxide semiconductor layer through a source region;

a drain electrode electrically connected to the oxide semiconductor layer through a drain region,

wherein the oxide semiconductor layer comprises a portion including silicon,

wherein a concentration of silicon in the portion including silicon is larger than a concentration of silicon in the source region and the drain region,

wherein the gate electrode comprises a stack of a first layer comprising copper and a second layer comprising a conductive material having heat resistance higher than copper.

2. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises indium.

3. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises an In—

Ga—

Zn-based oxide semiconductor.

4. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises a channel region that overlaps with the gate electrode.

5. The semiconductor device according to claim 1, wherein a whole of the oxide semiconductor layer overlaps with the gate electrode.

6. The semiconductor device according to claim 1, wherein the gate electrode is provided under the oxide semiconductor layer.

7. The semiconductor device according to claim 1, further comprising a second insulating layer comprising silicon oxide over the oxide semiconductor layer, the source electrode and the drain electrode,

wherein the second insulating layer is in contact with an upper surface of the oxide semiconductor layer.

8. A semiconductor device comprising:

a gate electrode;

an oxide semiconductor layer adjacent to the gate electrode;

an insulating layer between the gate electrode and the oxide semiconductor layer;

a source electrode electrically connected to the oxide semiconductor layer through a source region;

a drain electrode electrically connected to the oxide semiconductor layer through a drain region,

wherein the oxide semiconductor layer comprises a portion including silicon,

wherein a concentration of silicon in the portion including silicon is larger than a concentration of silicon in the source region and the drain region,

wherein the gate electrode comprises a stack of a first layer comprising copper and a second layer comprising one selected from the group consisting of titanium, molybdenum and tungsten.

9. The semiconductor device according to claim 8, wherein the oxide semiconductor layer comprises indium.

10. The semiconductor device according to claim 8, wherein the oxide semiconductor layer comprises an In—

Ga—

Zn-based oxide semiconductor.

11. The semiconductor device according to claim 8, wherein the oxide semiconductor layer comprises a channel region that overlaps with the gate electrode.

12. The semiconductor device according to claim 8, wherein a whole of the oxide semiconductor layer overlaps with the gate electrode.

13. The semiconductor device according to claim 8, wherein the gate electrode is provided under the oxide semiconductor layer.

14. The semiconductor device according to claim 8, wherein the second layer comprises titanium.

15. The semiconductor device according to claim 8, further comprising a second insulating layer comprising silicon oxide over the oxide semiconductor layer, the source electrode and the drain electrode,

wherein the second insulating layer is in contact with an upper surface of the oxide semiconductor layer.

16. A semiconductor device comprising:

a gate electrode;

an oxide semiconductor layer adjacent to the gate electrode;

an insulating layer between the gate electrode and the oxide semiconductor layer;

a source electrode electrically connected to the oxide semiconductor layer through a source region;

a drain electrode electrically connected to the oxide semiconductor layer through a drain region,

wherein the oxide semiconductor layer comprises a portion including silicon,

wherein a concentration of silicon in the portion including silicon is larger than a concentration of silicon in the source region and the drain region,

wherein the gate electrode comprises a stack of a first layer comprising copper and a second layer comprising one selected from the group consisting of titanium, molybdenum and tungsten,

wherein each of the source region and the drain region comprises nitrogen and oxygen.

17. The semiconductor device according to claim 16, wherein the oxide semiconductor layer comprises indium.

18. The semiconductor device according to claim 16, wherein the oxide semiconductor layer comprises an In—

Ga—

Zn-based oxide semiconductor.

19. The semiconductor device according to claim 16, wherein the oxide semiconductor layer comprises a channel region that overlaps with the gate electrode.

20. The semiconductor device according to claim 16, wherein a whole of the oxide semiconductor layer overlaps with the gate electrode.

21. The semiconductor device according to claim 16, wherein the gate electrode is provided under the oxide semiconductor layer.

22. The semiconductor device according to claim 16, further comprising a second insulating layer comprising silicon oxide over the oxide semiconductor layer, the source electrode and the drain electrode,

wherein the second insulating layer is in contact with an upper surface of the oxide semiconductor layer.

23. The semiconductor device according to claim 16, wherein the second layer comprises titanium.

24. A semiconductor device comprising:

a gate electrode;

an oxide semiconductor layer adjacent to the gate electrode, the oxide semiconductor layer comprising a channel region;

an insulating layer between the gate electrode and the oxide semiconductor layer;

a source electrode electrically connected to the oxide semiconductor layer through a source region;

a drain electrode electrically connected to the oxide semiconductor layer through a drain region,

wherein a concentration of silicon in a portion of the oxide semiconductor layer is larger than a concentration of silicon in at least one of the source region and the drain region,

wherein the gate electrode comprises a stack of a first layer comprising copper and a second layer comprising a conductive material having heat resistance higher than copper.

25. The semiconductor device according to claim 24, wherein the oxide semiconductor layer comprises an In—

Ga—

Zn-based oxide semiconductor.

26. The semiconductor device according to claim 24, wherein a whole of the oxide semiconductor layer overlaps with the gate electrode.

27. The semiconductor device according to claim 24, wherein the gate electrode is provided under the oxide semiconductor layer.

28. The semiconductor device according to claim 24, further comprising a second insulating layer comprising silicon oxide over the oxide semiconductor layer, the source electrode and the drain electrode,

wherein the second insulating layer is in contact with an upper surface of the oxide semiconductor layer.

29. The semiconductor device according to claim 24, wherein the conductive material is one selected from the group consisting of titanium, molybdenum and tungsten.