Superjunction structures for power devices and methods of manufacture

• US 8,786,010 B2
• Filed: 04/27/2011
• Issued: 07/22/2014
• Est. Priority Date: 04/27/2011
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Inventors: Yedinak, Joseph A., Rexer, Christopher L., Lee, Jaegil, Yilmaz, Hamza, Yun, Chongman
• Primary Examiner(s): KUO, WENSING W
• Application Number:
  US13/095,664
• Publication Number:
  US 20120273871A1
• Time in Patent Office: 1,182 Days
• Field of Search: None
• US Class Current: 257/328
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/0615 by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] LDD or drain offset regions H01L29/7833
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/0623 Buried supplementary region, e.g. buried guard ring multi-RESURF H01L29/0634
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0649 Dielectric regions, e.g. SiO2 regions, air gaps
• CPC Class Codes: H01L 29/0692 Surface layout
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/42372 characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out H01L29/42324 takes precedence
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

A power device includes a semiconductor region which in turn includes a plurality of alternately arranged pillars of first and second conductivity type. Each of the plurality of pillars of second conductivity type further includes a plurality of implant regions of the second conductivity type arranged on top of one another along the depth of pillars of second conductivity type, and a trench portion filled with semiconductor material of the second conductivity type directly above the plurality of implant regions of second conductivity type.

Claims

1. A power device comprising:

a semiconductor region;

an active region disposed in the semiconductor region;

a termination region disposed in the semiconductor region and surrounding the active region;

a plurality of pillars of a first conductivity type; and

a plurality of pillars of a second conductivity type disposed in the semiconductor region, the plurality of pillars of the first conductivity type and the plurality of pillars of the second conductivity type being alternatively arranged in the active region and the termination region, a pillar of the plurality of pillars of the second conductivity type including;

a first implant region of the second conductivity type,

a second implant region of the second conductivity type, the second implant region being disposed above, and vertically aligned with the first implant region of the second conductivity type,

a trench; and

a semiconductor material of the second conductivity type disposed in the trench, the trench being disposed above, and vertically aligned with the second implant region of the second conductivity type,

the plurality of pillars of the second conductivity type including a pillar in the active region having a lateral width that is greater than a lateral width of a pillar of the plurality of pillars of the second conductivity type in the termination region.

2. The power device of claim 1, further comprising:

a first epitaxial layer of the first conductivity type disposed on a substrate;

a second epitaxial layer of the first conductivity type disposed on the first epitaxial layer; and

a third epitaxial layer of the first conductivity type disposed on the second epitaxial layer,

the first implant region of the second conductivity type being disposed in the first epitaxial layer and in the second epitaxial layer, and

the second implant region of the second conductivity type being disposed in the second epitaxial layer and the third epitaxial layer.

3. The power device of claim 2, wherein the trench extends into and terminates within the third epitaxial layer.

4. The power device of claim 2 wherein:

the plurality of pillars of the second conductivity type terminate prior to reaching the substrate, and

the first epitaxial layer, the second epitaxial layer and the third epitaxial layer each has a doping concentration that is lower than a doping concentration of the substrate.

5. The power device of claim 1, wherein each of the first implant region of the second conductivity type, the second implant region of the second conductivity type and the semiconductor material of the second conductivity type has a same doping concentration.

6. The power device of claim 1, wherein a doping concentration of the first implant region of the second conductivity type is different than a doping concentration of the second implant region of the second conductivity type.

7. The power device of claim 1, wherein a shape of the first implant region of the second conductivity type is different than a shape of the second implant region of the second conductivity type.

8. The power device of claim 1, wherein the first implant region of the second conductivity type contacts the second implant region of the second conductivity type.

9. The power device of claim 1, wherein the second implant region of the second conductivity type is vertically spaced from the first implant region of the second conductivity type.

10. The power device of claim 1, wherein a pillar of the plurality of pillars of the first conductivity type includes:

a first implant region of the first conductivity type; and

a second implant region of the first conductivity type disposed above, and vertically aligned with the first implant region of the first conductivity type.

11. The power device of claim 10, wherein a shape of the first implant region of the first conductivity type is different than a shape of the second implant region of the first conductivity type.

12. The power device of claim 1 further, comprising:

a body region of the second conductivity type extending into the semiconductor region and defining a portion of at least one pillar of the pillars of the second conductivity type;

a source region of the first conductivity type extending into the body region; and

a gate electrode extending adjacent to, but being insulated from the body region, the gate electrode being disposed adjacent to the source region.

13. A power device comprising:

an active region;

a termination region surrounding the active region;

a plurality of pillars of a first conductivity type; and

a plurality of pillars of a second conductivity type, the plurality of pillars of the first conductivity type and the plurality of pillars of the second conductivity type being alternately arranged in the active region and the termination region, a pillar of the plurality of pillars of the second conductivity type including;

a first implant region of the second conductivity type;

a second implant region of the second conductivity type disposed above, and vertically aligned with the first implant region of the second conductivity type,

a trench; and

a semiconductor material of the second conductivity type disposed in the trench, the trench being disposed above, and vertically aligned with the second implant region of the second conductivity type,

the plurality of pillars of the second conductivity type including a pillar in the active region having a number of implant regions of the second conductivity type that is less than a number of implant regions of the second conductivity type of a pillar of the plurality of pillars of the second conductivity type in the termination region.

14. The power device of claim 13, further comprising:

a first epitaxial layer of the first conductivity type disposed on a substrate;

a second epitaxial layer of the first conductivity type disposed on the first epitaxial layer; and

a third epitaxial layer of the first conductivity type disposed on the second epitaxial layer,

the first implant region of the second conductivity type being disposed in the first epitaxial layer and the second epitaxial layer, and

the second implant region of the second conductivity type being disposed in the second epitaxial layer and the third epitaxial layer.

15. The power device of claim 14, wherein the trench extends into and terminates within the third epitaxial layer.

16. The power device of claim 13, wherein the first implant region of the second conductivity type has a shape that is different than a shape of the second implant region of the second conductivity type.

17. The power device of claim 13, wherein the first implant region of the second conductivity type has a lateral width that is different than a lateral width of the second implant region of the second conductivity type.

18. The power device of claim 13, wherein a pillar of the plurality of pillars of the first conductivity type includes:

a first implant region of the first conductivity type; and

a second implant region of the first conductivity type disposed above, and vertically aligned with the first implant region of the first conductivity type.

19. The power device of claim 18, wherein a pillar of the plurality of pillars of the first conductivity type in the active region has a shape that is different than a shape of a pillar of the plurality of pillars of the first conductivity type in the termination region.

20. The power device of claim 18, wherein a pillar of the plurality of pillars of the first conductivity type in the active region has a number of implant regions of the first conductivity type that is less than a number of implant regions of the first conductivity type of a pillar of the plurality of pillars of the first conductivity type in the termination region.

21. A method for forming a power device including pillars of alternating conductivity type, the method comprising:

forming a semiconductor region on a substrate, the semiconductor region including a plurality of epitaxial layers of a first conductivity type;

defining an active region of the power device in the semiconductor region;

defining a termination region of the power device in the semiconductor region, the termination region surrounding the active region;

forming a plurality of pillars of a second conductivity type in the active region and the termination region, the forming a pillar of the plurality of pillars of the second conductivity type including;

forming a plurality of implant regions of the second conductivity type, each of the plurality of implant regions of the second conductivity type being disposed in at least one epitaxial layer of the plurality of epitaxial layers of the first conductivity type;

forming a trench extending into an upper-most epitaxial layer of the plurality of epitaxial layers; and

forming a semiconductor material of the second conductivity type in the trench,

the plurality of implant regions of the second conductivity type and the trench being vertically aligned such that the semiconductor material of the second conductivity type and the plurality of implant regions of the second conductivity type define a pillar of the second conductivity type, the plurality of pillars of the second conductivity type in the active region including a pillar having a number of implant regions of the second conductivity type that is less than a number of implant regions of the second conductivity type of a pillar of the plurality of pillars of the second conductivity type in the termination region,

the forming the plurality of pillars of the second conductivity type defining a plurality of pillars of the first conductivity type in the active region and the termination region, the plurality of pillars of the first conductivity including portions of the plurality of epitaxial layers disposed between the plurality of pillars of the second conductivity type.

22. The method of claim 21, wherein each of the plurality of implant regions of the second conductivity type is disposed in at least two epitaxial layers of the plurality of epitaxial layers.

23. The method of claim 21, wherein a pillar of the plurality of pillars of the second conductivity type in the active region has a shape that is different than a shape of a pillar of the plurality of pillars of the second conductivity type in the termination region.

24. The method of claim 21, wherein a pillar of the plurality of pillars of the second conductivity type in the active region has a lateral width that is greater than a lateral width of a pillar of the plurality of pillars of the second conductivity type in the termination region.

25. The method of claim 21, wherein a pillar of the plurality of pillars of the first conductivity type includes:

a first implant region of the first conductivity type; and

a second implant region of the first conductivity type disposed above, and vertically aligned with the first implant region of the first conductivity type.

26. The method of claim 25, wherein a pillar of the plurality of pillars of the first conductivity type in the active region has a shape that is different than a shape of a pillar of the plurality of pillars of the first conductivity type in the termination region.

27. The method of claim 25, wherein a pillar of the plurality of pillars of the first conductivity type in the active region has a number of implant regions of the first conductivity type that is less than a number of implant regions of the first conductivity type than a pillar of the plurality of pillars of the first conductivity type in the termination region.

28. The method of claim 21, wherein the semiconductor region includes at least one epitaxial layer of the second conductivity type.

29. A method for forming a power device including pillars of alternating conductivity type, the method comprising:

forming a semiconductor region on a substrate, the semiconductor region including a plurality of epitaxial layers of a first conductivity type;

defining an active region of the power device in the semiconductor region;

defining a termination region of the power device in the semiconductor region, the termination region surrounding the active region;

forming a plurality of pillars of a second conductivity type in the active region and the termination region, the forming a pillar of the plurality of pillars of the second conductivity type including;

forming a plurality of implant regions of the second conductivity type, each of the plurality of implant regions of the second conductivity type being disposed in at least one epitaxial layer of the plurality of epitaxial layers of the first conductivity type;

forming a trench extending into an upper-most epitaxial layer of the plurality of epitaxial layers; and

forming a semiconductor material of the second conductivity type in the trench,

the plurality of implant regions of the second conductivity type and the trench being vertically aligned such that the semiconductor material of the second conductivity type and the plurality of implant regions of the second conductivity type define a pillar of the second conductivity type, the plurality of pillars of the second conductivity type in the active region including a pillar having a lateral width that is greater than a lateral width of a pillar of the plurality of pillars of the second conductivity type in the termination region,

the forming the plurality of pillars of the second conductivity type defining a plurality of pillars of the first conductivity type in the active region and the termination region, the plurality of pillars of the first conductivity including portions of the plurality of epitaxial layers disposed between the plurality of pillars of the second conductivity type.

30. The method of claim 29, wherein each of the plurality of implant regions of the second conductivity type is disposed in at least two epitaxial layers of the plurality of epitaxial layers.

31. The method of claim 29, wherein a pillar of the plurality of pillars of the second conductivity type in the active region has a shape that is different than a shape of a pillar of the plurality of pillars of the second conductivity type in the termination region.

32. The method of claim 29, wherein a pillar of the plurality of pillars of the second conductivity type in the active region has a number of implant regions of the second conductivity type that is less than a number of implant regions of the second conductivity type of a pillar of the plurality of pillars of the second conductivity type in the termination region.

33. The method of claim 29, wherein a pillar of the plurality of pillars of the first conductivity type includes:

a first implant region of the first conductivity type; and

a second implant region of the first conductivity type disposed above, and vertically aligned with the first implant region of the first conductivity type.

34. The method of claim 29, wherein a pillar of the plurality of pillars of the first conductivity type in the active region has a shape that is different than a shape of a pillar of the plurality of pillars of the first conductivity type in the termination region.

35. The method of claim 29, wherein a pillar of the plurality of pillars of the first conductivity type in the active region has a number of implant regions of the first conductivity type that is less than a number of implant regions of the first conductivity type than a pillar of the plurality of pillars of the first conductivity type in the termination region.