Gallium-nitride-on-handle substrate materials and devices and method of manufacture

• US 8,786,053 B2
• Filed: 01/24/2011
• Issued: 07/22/2014
• Est. Priority Date: 01/24/2011
• Status: Expired due to Fees

• Current Assignee: SL Technology Incorporated (Reliv' International, Inc.)
• Original Assignee: Soraa, Inc.
• Inventors: D'Evelyn, Mark P., Chakraborty, Arpan, Houck, William
• Primary Examiner(s): Nguyen, Ha Tran T
• Assistant Examiner(s): Gupta, Raj R
• Application Number:
  US13/012,674
• Publication Number:
  US 20120187412A1
• Time in Patent Office: 1,275 Days
• Field of Search: 257/76, 257/617
• US Class Current: 257/617
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/76254 with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
• CPC Class Codes: H01L 2221/68327 used during dicing or grinding
• CPC Class Codes: H01L 2221/6835 used as a support during build up manufacturing of active devices
• CPC Class Codes: H01L 2221/68381 Details of chemical or physical process used for separating the auxiliary support from a device or wafer
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/49107 on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83193 wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 24/83 using a layer connector
• CPC Class Codes: H01L 29/02 Semiconductor bodies ; Multistep manufacturing processes therefor
• CPC Class Codes: H01L 29/0692 Surface layout
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/12032 Schottky diode
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/12043 : Photo diode
• CPC Class Codes: H01L 2924/1301 : Thyristor
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13062 : Junction field-effect transistor [JFET]
• CPC Class Codes: H01L 33/007 : comprising nitride compounds
• CPC Class Codes: H01L 33/0093 : Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/22 : Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/32 : containing nitrogen
• CPC Class Codes: H01L 33/382 : the electrode extending partially in or entirely through the semiconductor body
• CPC Class Codes: H01L 33/50 : Wavelength conversion elements

Abstract

A gallium and nitrogen containing substrate structure includes a handle substrate member having a first surface and a second surface and a transferred thickness of gallium and nitrogen material. The structure has a gallium and nitrogen containing active region grown overlying the transferred thickness and a recessed region formed within a portion of the handle substrate member. The substrate structure has a conductive material formed within the recessed region configured to transfer thermal energy from at least the transferred thickness of gallium and nitrogen material.

Claims

1. A gallium and nitrogen containing device comprising:

a handle substrate member comprising a first surface region and a second surface region, wherein the second surface region is opposite the first surface region;

an adhesion layer overlying the second surface region;

a gallium and nitrogen containing material overlying the adhesion layer, wherein the gallium and nitrogen containing material comprises at least one a core region extending through a thickness of the gallium and nitrogen containing material;

an interface region overlying the gallium and nitrogen containing material;

at least one n-type epitaxial growth region overlying the interface region;

at least one core structure extending from the at least one core region and through a thickness of the at least one n-type epitaxial growth region;

an active region overlying the at least one n-type epitaxial growth region;

a p-type region overlying the active region; and

at least one p-contact region overlying the p-type region.

2. The device of claim 1, wherein the interface region is characterized by a defect density of less than about 10⁶-10⁷ cm⁻

2 within a matrix of low-dislocation density regions adjacent to at least one core structure.

3. The device of claim 1, wherein the gallium and nitrogen containing material comprises a dot core gallium and nitrogen containing substrate.

4. The device of claim 1 wherein the second surface region comprises a patterned, textured, or roughened surface structure.

5. The device of claim 1, further comprising:

at least one mesa structure, wherein the mesa structure comprises the active region, the p-type region, and the at least one p-contact region;

an exposed n-type epitaxial growth region adjacent the at least one mesa structure; and

at least one n-contact region overlying the exposed n-type epitaxial growth region.

6. The device of claim 1, wherein the gallium and nitrogen containing material comprises a dot core gallium and nitrogen containing substrate.

7. The device of claim 1, wherein the first surface region comprises a patterned, textured, or roughened surface structure.

8. The device of claim 1, wherein the handle substrate comprises a material selected from sapphire, aluminum oxide, mullite, silicon, silicon nitride, germanium, gallium arsenide, silicon carbide, MgAl₂O₄ spinel, zinc oxide, indium tin oxide (ITO), indium oxide, tin oxide, indium phosphide, beryllium oxide, chemical-vapor-deposition (CVD) diamond, single crystal diamond, YAG:

Ce, gallium nitride, indium nitride, gallium aluminum indium nitride, aluminum oxynitride, aluminum nitride, and a combination of any of the foregoing.

9. The device of claim 1, further comprising a street between one or more adjacent p-contact regions, wherein the street provides an electrical insulation barrier between a p-contact region and at least one core region.

10. The device of claim 9, wherein the at least one core region comprises a square array of core regions;

and

the one or more p-contact regions are approximately square.

11. The device of claim 9, wherein the at least one core region comprises a hexagonal array;

and

the one or more adjacent p-contact regions are approximately triangular.

12. The device of claim 1,

wherein the handle substrate member is electrically conducting;

and

further comprising at least one n-contact region overlying the first surface region.

13. The device of claim 12, wherein the interface region comprises a defect density of less than about 10⁶ cm⁻

2 to 10⁷ cm<sup>−

2</sup> within the matrix region between cores.

14. The device of claim 12, wherein the second surface region comprises a patterned, textured, or roughened surface structure.

15. The device of claim 12, further comprising a street between one or more adjacent p-contact regions, wherein the street provides an electrical insulation barrier between a p-contact region and at least one core region.

16. The device of claim 1,

wherein the handle substrate member is electrically insulating;

and

further comprising;

at least one mesa structure, wherein the at least one mesa structure comprises the active region, the p-type region, and the at least one p-contact region;

an exposed n-type epitaxial growth region adjacent the at least one mesa structure; and

an n-contact region overlying the exposed n-type epitaxial growth region.

17. The device of claim 16, wherein the interface region comprises a defect density of less than about 10⁶ cm⁻

2 to 10⁷ cm<sup>−

2</sup> within the matrix region between cores.

18. The device of claim 16, wherein the second surface region comprises a patterned, textured, or roughened surface structure.

19. The device of claim 16, further comprising a street between one or more adjacent p-contact regions, wherein the street provides an electrical insulation barrier between a p-contact region and at least one core region.

20. The device of claim 1,

wherein the handle substrate member is electrically conducting;

and

further comprising;

at least one n-contact region overlying the first surface region; and

a second handle substrate member overlying the p-type active region, wherein,

the second handle substrate member is transparent or reflective, the second handle substrate member is electrically conductive; and

the at least one p-contact region overlies the second handle substrate.

21. The device of claim 20, wherein the second handle substrate member comprises a material selected from indium tin oxide, ZnO, SnO, and silver-coated silicon.

22. The device of claim 20, wherein the interface region comprises a defect density of less than about 10⁶ cm⁻

2 to 10⁷ cm<sup>−

2</sup> within the matrix region between cores.

23. The device of claim 20, wherein the second surface region comprises a patterned, textured, or roughened surface structure.

24. The device of claim 20, further comprising a street between one or more adjacent p-contact regions, wherein the street provides an electrical insulation barrier between a p-contact region and at least one core region.