Semiconductor package integrated with conformal shield and antenna

• US 8,786,060 B2
• Filed: 05/04/2012
• Issued: 07/22/2014
• Est. Priority Date: 05/04/2012
• Status: Active Grant

• Current Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Original Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Inventors: Chung, Chi-Sheng, Liao, Kuo-Hsien, Yeh, Yung-I, Yen, Han-Chee
• Primary Examiner(s): Lee, Calvin
• Application Number:
  US13/464,910
• Publication Number:
  US 20130292808A1
• Time in Patent Office: 809 Days
• Field of Search: 257659-660, 257687-690, 257E31001-E31131, 438 59- 63
• US Class Current: 257/660
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/05572 the external layer extending out of an opening
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/81 using a bump connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 23/49805 the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
• CPC Class Codes: H01L 23/5225 Shielding layers formed together with wiring layers
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/96 the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/16 : the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15313 : being a land array, e.g. LGA
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/1815 : Shape
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01Q 1/2283 : mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
• CPC Class Codes: H01Q 23/00 : Antennas with active circuits or circuit elements integrated within them or attached to them
• CPC Class Codes: H01Q 9/0407 : Substantially flat resonant element parallel to ground plane, e.g. patch antenna dipole H01Q9/285; monopole H01Q9/40

Abstract

A semiconductor package includes a substrate, a semiconductor die, a package body, an electromagnetic interference shield, a dielectric structure and an antenna element. The substrate comprises a grounding segment and a feeding point. The semiconductor die is disposed on the substrate. The package body encapsulates the semiconductor die. The electromagnetic interference shield is formed on the package body. The dielectric structure encapsulates the electromagnetic interference shield. The antenna element is formed on the dielectric structure and electrically connecting the grounding segment of the substrate and the feeding point.

Claims

1. A semiconductor package, comprising:

a substrate;

a semiconductor die disposed on the substrate;

a package body encapsulating the semiconductor die and having an upper surface;

an electromagnetic interference shield formed directly on the upper surface of the package body;

a dielectric structure covering the electromagnetic interference shield;

an antenna formed on the dielectric structure;

a feeding element connecting the antenna and a feeding point of the substrate; and

an antenna grounding element connecting the antenna and the electromagnetic interference shield, wherein the feeding element penetrates the package body and the dielectric structure.

2. The semiconductor package of claim 1, wherein the antenna grounding element is disposed within the dielectric structure.

3. The semiconductor package of claim 1, wherein the antenna grounding element and the feeding element form an extension portion of the antenna on a lateral surface of the dielectric structure.

4. The semiconductor package of claim 1, further comprising:

a grounding frame disposed on the substrate and connecting the substrate and the electromagnetic interference shield.

5. The semiconductor package of claim 1, further comprising:

a dielectric material layer covering the dielectric structure;

wherein the permittivity of the dielectric material layer is higher than that of the dielectric structure.

6. The semiconductor package of claim 1, wherein the antenna grounding element is a conductive via.

7. The semiconductor package of claim 6, wherein the antenna grounding element penetrates the dielectric structure and connects the antenna and the electromagnetic interference shield.

8. The semiconductor package of claim 6, wherein the antenna grounding element includes a conductive material disposed in a through hole in the dielectric structure, the through hole extending from the antenna to the electromagnetic interference shield.

9. The semiconductor package of claim 1, wherein the electromagnetic interference shield is a film formed directly onto the package body.

10. The semiconductor package of claim 9, wherein the film comprising the electromagnetic shield is formed by material deposition.

11. A semiconductor package, comprising:

a substrate;

a semiconductor die disposed on the substrate;

a package body encapsulating the semiconductor die and having an upper surface;

an electromagnetic interference shield disposed directly on the upper surface of the package body;

a dielectric structure covering the electromagnetic interference shield;

an antenna formed on the dielectric structure;

a feeding element connecting the antenna and a feeding point of the substrate; and

a conductive via penetrating entirely through the dielectric structure connecting the antenna and the electromagnetic interference shield, forming an antenna grounding element wherein the feeding element penetrates the package body and the dielectric structure.

12. The semiconductor package of claim 11, further comprising:

a grounding frame disposed on the substrate and connecting the substrate and the electromagnetic interference shield.

13. The semiconductor package of claim 11, further comprising:

a dielectric material layer covering the dielectric structure;

wherein the permittivity of the dielectric material layer is higher than that of the dielectric structure.

14. The semiconductor package of claim 13, wherein the dielectric material layer is a ceramic material.

15. The semiconductor package of claim 11, wherein the package body further comprises a lateral side and the electromagnetic interference shield extends to, and is disposed directly on, the lateral side.

16. A semiconductor package, comprising:

a substrate;

a die disposed on the substrate;

a package body encapsulating the die and having an upper surface;

an electromagnetic interference shield comprising a film disposed directly onto the upper surface of the package body;

a dielectric structure covering the electromagnetic interference shield;

an antenna disposed on an upper surface of the dielectric structure;

a feeding element connecting the antenna and a feeding point of the substrate; and

a conductive via formed in the dielectric structure connecting the antenna and the electromagnetic interference shield, forming an antenna grounding element wherein the feeding element penetrates the package body and the dielectric structure.

17. The semiconductor package of claim 16, wherein the conductive via is formed in a through hole in the dielectric structure, the through hole extending from the antenna to the electromagnetic interference shield.

18. The semiconductor package of claim 16, wherein the electromagnetic interference shield is formed by material deposition directly onto the package body.