Semiconductor device

• US 8,786,311 B2
• Filed: 10/22/2013
• Issued: 07/22/2014
• Est. Priority Date: 05/20/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Ohmaru, Takuro, Shionoiri, Yutaka
• Primary Examiner(s): Chang, Daniel D
• Application Number:
  US14/060,020
• Publication Number:
  US 20140042496A1
• Time in Patent Office: 273 Days
• Field of Search: 326/44, 326 39- 41, 326/112, 326/113, 326/119
• US Class Current: 326/44
• CPC Class Codes: H01L 27/105 including field-effect components
• CPC Class Codes: H03K 19/1776 for memories
• CPC Class Codes: H03K 19/17764 for reliability
• CPC Class Codes: H03K 19/17772 for powering on or off

Abstract

A programmable analog device in which data can be held even when supply of a power supply potential is stopped. The programmable circuit includes unit cells connected in parallel or in series, and each of the unit cells includes an analog element. A conduction state of each of the unit cells is changed between an on state and an off state. Each of the unit cells includes, as a switch of the unit cell, a first transistor having a sufficiently low off-state current and a second transistor, a gate electrode of the second transistor being electrically connected to a source or drain electrode of the first transistor. The conduction state of the unit cell is controlled with a potential of the gate electrode of the second transistor, which can be kept even when no power is supplied thanks to the low off-state current of the first transistor.

Claims

1. A semiconductor device comprising:

a programmable circuit comprising;

a first analog element;

a second analog element;

a first transistor;

a second transistor;

a third transistor; and

a fourth transistor,

wherein one of a source and a drain of the first transistor is electrically connected to a first terminal of the first analog element,

wherein one of a source and a drain of the second transistor is electrically connected to a gate of the first transistor,

wherein one of a source and a drain of the third transistor is electrically connected to a first terminal of the second analog element,

wherein one of a source and a drain of the fourth transistor is electrically connected to a gate of the third transistor,

wherein a second terminal of the first analog element is electrically connected to a second terminal of the second analog element,

wherein the other of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the third transistor, and

wherein each of the second transistor and the fourth transistor comprises a channel formation region comprising an oxide semiconductor.

2. The semiconductor device according to claim 1,

wherein the programmable circuit further comprises an input signal line and an output signal line,

wherein the input signal line is electrically connected to the second terminal of the first analog element and the second terminal of the second analog element, and

wherein the output signal line is electrically connected to the other of the source and the drain of the first transistor and the other of the source and the drain of the third transistor.

3. The semiconductor device according to claim 1,

wherein each of the first transistor and the third transistor comprises a channel formation region comprising silicon.

4. The semiconductor device according to claim 1,

wherein the programmable circuit further comprises a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a first inverter and a second inverter,

wherein one of a source and a drain of the fifth transistor is electrically connected to the one of the source and the drain of the first transistor,

wherein the other of the source and the drain of the fifth transistor is electrically connected to the other of the source and the drain of the first transistor,

wherein one of a source and a drain of the sixth transistor is electrically connected to a gate of the fifth transistor,

wherein a gate of the sixth transistor is electrically connected to a gate of the second transistor,

wherein the other of the source and the drain of the sixth transistor is electrically connected to the other of the source and the drain of the second transistor via the first inverter,

wherein one of a source and a drain of the seventh transistor is electrically connected to the one of the source and the drain of the third transistor,

wherein the other of the source and the drain of the seventh transistor is electrically connected to the other of the source and the drain of the third transistor,

wherein one of a source and a drain of the eighth transistor is electrically connected to a gate of the seventh transistor,

wherein a gate of the eighth transistor is electrically connected to a gate of the fourth transistor, and

wherein the other of the source and the drain of the eighth transistor is electrically connected to the other of the source and the drain of the fourth transistor via the second inverter.

5. A semiconductor device comprising:

a programmable circuit comprising;

a first analog element;

a second analog element;

a third analog element;

a fourth analog element;

a first transistor;

a second transistor;

a third transistor;

a fourth transistor;

a fifth transistor;

a sixth transistor;

a seventh transistor; and

an eighth transistor,

wherein one of a source and a drain of the first transistor is electrically connected to a first terminal of the first analog element,

wherein one of a source and a drain of the second transistor is electrically connected to a gate of the first transistor,

wherein one of a source and a drain of the third transistor is electrically connected to a first terminal of the second analog element,

wherein one of a source and a drain of the fourth transistor is electrically connected to a gate of the third transistor,

wherein a second terminal of the first analog element is electrically connected to a second terminal of the second analog element,

wherein the other of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the third transistor,

wherein one of a source and a drain of the fifth transistor is electrically connected to a first terminal of the third analog element,

wherein one of a source and a drain of the sixth transistor is electrically connected to a gate of the fifth transistor,

wherein one of a source and a drain of the seventh transistor is electrically connected to a first terminal of the fourth analog element,

wherein one of a source and a drain of the eighth transistor is electrically connected to a gate of the seventh transistor,

wherein a second terminal of the third analog element is electrically connected to a second terminal of the fourth analog element,

wherein the other of the source and the drain of the fifth transistor is electrically connected to the other of the source and the drain of the seventh transistor,

wherein the other of the source and the drain of the first transistor is electrically connected to the second terminal of the third analog element,

wherein the other of the source and the drain of the third transistor is electrically connected to the second terminal of the fourth analog element,

wherein a gate of the second transistor is electrically connected to a gate of the sixth transistor,

wherein a gate of the fourth transistor is electrically connected to a gate of the eighth transistor, and

wherein each of the second transistor, the fourth transistor, the sixth transistor and the eighth transistor comprises a channel formation region comprising an oxide semiconductor.

6. The semiconductor device according to claim 5,

wherein the programmable circuit further comprises an input signal line and an output signal line,

wherein the input signal line is electrically connected to the second terminal of the first analog element and the second terminal of the second analog element, and

wherein the output signal line is electrically connected to the other of the source and the drain of the fifth transistor and the other of the source and the drain of the seventh transistor.

7. The semiconductor device according to claim 5,

wherein each of the first transistor, the third transistor, the fifth transistor and the seventh transistor comprises a channel formation region comprising silicon.

8. The semiconductor device according to claim 5,

wherein the programmable circuit further comprises an input signal line and a first output signal line and a second output signal line,

wherein the input signal line is electrically connected to the second terminal of the first analog element and the second terminal of the second analog element,

wherein the first output signal line is electrically connected to the other of the source and the drain of the first transistor and the other of the source and the drain of the third transistor, and

wherein the second output signal line is electrically connected to the other of the source and the drain of the fifth transistor and the other of the source and the drain of the seventh transistor.

9. A semiconductor device comprising:

a programmable circuit comprising;

a first capacitor;

a second capacitor;

a first transistor;

a second transistor;

a third transistor; and

a fourth transistor,

wherein one of a source and a drain of the first transistor is electrically connected to a first electrode of the first capacitor,

wherein one of a source and a drain of the second transistor is electrically connected to a gate of the first transistor,

wherein one of a source and a drain of the third transistor is electrically connected to a first electrode of the second capacitor,

wherein one of a source and a drain of the fourth transistor is electrically connected to a gate of the third transistor,

wherein a second electrode of the first capacitor is electrically connected to a second electrode of the second capacitor,

wherein the other of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the third transistor, and

wherein each of the second transistor and the fourth transistor comprises a channel formation region comprising an oxide semiconductor.

10. The semiconductor device according to claim 9,

wherein the programmable circuit further comprises an input signal line and an output signal line,

wherein the input signal line is electrically connected to the second electrode of the first capacitor and the second electrode of the second capacitor, and

wherein the output signal line is electrically connected to the other of the source and the drain of the first transistor and the other of the source and the drain of the third transistor.

11. The semiconductor device according to claim 9,

wherein each of the first transistor and the third transistor comprises a channel formation region comprising silicon.

12. The semiconductor device according to claim 9, comprising an antenna circuit comprising the programmable circuit.

13. A semiconductor device comprising:

a programmable circuit comprising;

a first resistor;

a second resistor;

a first transistor;

a second transistor;

a third transistor; and

a fourth transistor,

wherein one of a source and a drain of the first transistor is electrically connected to a first terminal of the first resistor,

wherein one of a source and a drain of the second transistor is electrically connected to a gate of the first transistor,

wherein one of a source and a drain of the third transistor is electrically connected to a first terminal of the second resistor,

wherein one of a source and a drain of the fourth transistor is electrically connected to a gate of the third transistor,

wherein a second terminal of the first resistor is electrically connected to a second terminal of the second resistor,

wherein the other of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the third transistor, and

wherein each of the second transistor and the fourth transistor comprises a channel formation region comprising an oxide semiconductor.

14. The semiconductor device according to claim 13,

wherein the programmable circuit further comprises an input signal line and an output signal line,

wherein the input signal line is electrically connected to the second terminal of the first resistor and the second terminal of the second resistor, and

wherein the output signal line is electrically connected to the other of the source and the drain of the first transistor and the other of the source and the drain of the third transistor.

15. The semiconductor device according to claim 13,

wherein each of the first transistor and the third transistor comprises a channel formation region comprising silicon.

16. The semiconductor device according to claim 13, comprising a resistor divider circuit comprising the programmable circuit.

17. A semiconductor device comprising:

a programmable circuit comprising;

a first photoelectric conversion element;

a second photoelectric conversion element;

a first transistor;

a second transistor;

a third transistor; and

a fourth transistor,

wherein one of a source and a drain of the first transistor is electrically connected to a first electrode of the first photoelectric conversion element,

wherein one of a source and a drain of the second transistor is electrically connected to a gate of the first transistor,

wherein one of a source and a drain of the third transistor is electrically connected to a first electrode of the second photoelectric conversion element,

wherein one of a source and a drain of the fourth transistor is electrically connected to a gate of the third transistor,

wherein a second electrode of the first photoelectric conversion element is electrically connected to a second electrode of the second photoelectric conversion element,

wherein the other of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the third transistor, and

wherein each of the second transistor and the fourth transistor comprises a channel formation region comprising an oxide semiconductor.

18. The semiconductor device according to claim 17,

wherein the programmable circuit further comprises an input signal line and an output signal line,

wherein the input signal line is electrically connected to the second electrode of the first photoelectric conversion element and the second electrode of the second photoelectric conversion element, and

wherein the output signal line is electrically connected to the other of the source and the drain of the first transistor and the other of the source and the drain of the third transistor.

19. The semiconductor device according to claim 17,

wherein each of the first transistor and the third transistor comprises a channel formation region comprising silicon.