Frequency mixer with compensated DC offset correction to reduce linearity degradation

• US 8,787,503 B2
• Filed: 09/18/2012
• Issued: 07/22/2014
• Est. Priority Date: 09/18/2012
• Status: Active Grant

• Current Assignee: Rovi Guides, Inc. (Adeia Inc.)
• Original Assignee: VIXS Systems Incorporated (Pixelworks Incorporated)
• Inventors: Simmonds, David
• Primary Examiner(s): Bayard, Emmanuel
• Application Number:
  US13/622,014
• Publication Number:
  US 20140079157A1
• Time in Patent Office: 672 Days
• Field of Search: 375316-319
• US Class Current: 375/319
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22

Abstract

An apparatus includes a frequency mixer circuit configured to generate a baseband signal based on a local oscillator signal and a radio frequency signal. The apparatus includes a compensation circuit configured to generate a DC offset-compensated signal based on the baseband signal, a DC offset compensation signal, and a second signal. The DC offset compensation signal and the second signal have currents approximately equal in magnitude and opposite in direction. A current of the DC offset-compensated signal is substantially the same as a current of the baseband signal. The compensation circuit may include a DC digital-to-analog converter circuit configured to generate the DC offset compensation signal and the second signal based on a control signal.

Claims

1. An apparatus comprising:

a frequency mixer circuit configured to generate a baseband signal based on a local oscillator signal and a radio frequency signal; and

a compensation circuit configured to generate a DC offset-compensated signal based on the baseband signal, a DC offset compensation signal, and a second signal, the DC offset compensation signal and the second signal having currents approximately equal in magnitude and opposite in direction, a current of the DC offset-compensated signal being substantially the same as a current of the baseband signal.

2. The apparatus, as recited in claim 1, wherein the DC offset compensation signal and the second signal introduce equal and opposite currents to the baseband signal.

3. The apparatus, as recited in claim 1, wherein the DC offset compensation signal and the second signal are based on a control signal, the apparatus further comprising:

a processor circuit configured to generate the control signal based on a digital version of the baseband signal.

4. The apparatus, as recited in claim 1, wherein the compensation circuit comprises a DC digital-to-analog converter circuit configured to generate the DC offset compensation signal and the second signal based on a control signal.

5. The apparatus, as recited in claim 4, wherein the DC digital-to-analog converter circuit comprises:

a current source configured to source a current, corresponding to the second signal, to a first node based on the control signal;

a resistor coupled to the first node and a second node; and

a current sink configured to sink a current, corresponding to the DC offset compensation signal, from the second node based on the control signal.

6. The apparatus, as recited in claim 1, further comprising:

a first differential node coupled to an output of the frequency mixer circuit and the input of the compensation circuit,

a second differential node coupled to the output of the compensation circuit,

wherein the compensation circuit comprises;

a first compensation circuit configured to provide the DC offset compensation signal to a first node of the second differential node in response to the control signal indicating a positive DC offset compensation voltage and configured to be disabled otherwise; and

a second compensation circuit configured to provide the DC offset compensation signal to a second node of the second differential node in response to the control signal indicating a negative DC offset compensation voltage and configured to be disabled otherwise.

7. The apparatus, as recited in claim 6,

wherein the first compensation circuit comprises:

a first current source configured to source a current to a third node of the first differential node based on the control signal;

a first resistor coupled to the first node and the third node; and

a first current sink configured to sink a current from the first node based on the control signal, and

wherein the second compensation circuit comprises;

a second current source configured to source a current to a fourth node of the first differential node based on the control signal;

a second resistor coupled to the second node and the fourth node; and

a second current sink configured to sink a current from the second node based on the control signal.

8. The apparatus, as recited in claim 7,

wherein the first current sink and the first current source are configured to generate first currents corresponding to the DC offset compensation signal and the second signal, respectively, in response to a positive value of the control signal, and are disabled in response to a negative value of the control signal,

wherein the second current sink and the second current source are configured to generate second currents corresponding to the DC offset compensating signal and the second signal, respectively in response to the negative value of the control signal, and are disabled in response to a positive value of the control signal, and

wherein magnitudes of the first and second currents are based on the control signal.

9. The apparatus, as recited in claim 1, wherein a second-order input intercept point of the mixer circuit is substantially unchanged by the DC offset compensation circuit.

10. The apparatus, as recited in claim 1, wherein the compensation circuit is directly connected to the frequency mixer circuit.

11. The apparatus, as recited in claim 1, wherein the means for compensating is directly connected to the frequency mixer circuit.

12. A method comprising:

generating a baseband signal based on a radio frequency signal and a local oscillator signal; and

generating a DC offset-compensated signal based on the baseband signal, a DC offset compensation signal, and a second signal, the DC offset compensation signal and the second signal having currents approximately equal in magnitude and opposite in direction, a current of the DC offset-compensated signal being substantially the same as a current of the baseband signal.

13. The method, as recited in claim 12, further comprising:

enabling one of a first compensation circuit and a second compensation circuit based on a sign of a DC offset compensation control signal; and

disabling the other of the first compensation circuit and the second compensation circuit based on the sign of the DC offset compensation control signal.

14. The method, as recited in claim 12, wherein generating the DC offset-compensated signal comprises:

sourcing a first current to a first path of a differential path of the baseband signal in response to a first sign of the DC offset compensation control signal; and

sinking a second current from the first path in response to the first sign of the DC offset compensation control signal, the second current having a magnitude approximately equal to a magnitude of the first current.

15. The method, as recited in claim 14, wherein generating the DC offset-compensated signal further comprises:

determining a magnitude of the first current based on the DC offset compensation control signal.

16. The method, as recited in claim 14, wherein generating the DC offset-compensated signal further comprises:

sourcing a third current to a second path of the differential path of the baseband signal in response to a second sign of the DC offset compensation control signal; and

sinking a fourth current from the second path in response to the second sign of the DC offset compensation control signal, the fourth current having a magnitude approximately equal to a magnitude of the third current.

17. The method, as recited in claim 16, wherein generating the DC offset-compensated signal comprises:

determining a magnitude of the third current based on the DC offset compensation control signal.

18. The method, as recited in claim 12, wherein a second-order input intercept point of a mixer circuit generating the baseband signal is substantially unchanged by the DC offset compensation circuit.

19. The method, as recited in claim 12, further comprising:

generating the DC offset compensation signal based on a digital version of the DC offset-compensated signal.

20. An apparatus comprising:

a mixer circuit; and

means for compensating for a DC offset in a baseband signal of a receiver path including the mixer circuit by introducing a DC offset voltage and zero net current into the baseband signal.