Identification of integrated circuits

• US 8,788,559 B2
• Filed: 12/03/2013
• Issued: 07/22/2014
• Est. Priority Date: 05/11/2009
• Status: Active Grant

• Current Assignee: Empire Technology Development LLC (Allied Inventors Management, LLC), Regents of the University of California (University of California)
• Original Assignee: Empire Technology Development LLC (Allied Inventors Management, LLC)
• Inventors: Potkonjak, Miodrag, Koushanfar, Farinaz
• Primary Examiner(s): SUN, SCOTT C
• Application Number:
  US14/095,252
• Publication Number:
  US 20140088892A1
• Time in Patent Office: 231 Days
• Field of Search: None
• US Class Current: 708/446
• CPC Class Codes: G01R 19/25 using digital measurement techniques
• CPC Class Codes: G01R 31/2851 Testing of integrated circuits [IC] G01R31/317 takes precedence; testing individual devices G01R31/26; testing printed circuits G01R31/2801
• CPC Class Codes: G06F 15/00 Digital computers in general details G06F1/00 – G06F13/00; Data processing equipment in general
• CPC Class Codes: G06F 21/73 by creating or determining hardware identification, e.g. serial numbers

Abstract

Techniques are generally described for generating an identification number for an integrated circuit (IC). In some examples, methods for generating an identification for an IC may comprise selecting circuit elements of the IC, evaluating measurements of an attribute of the IC for the selected circuit elements, wherein individual measurements are associated with corresponding input vectors previously applied to the IC, solving a plurality of equations formulated based at least in part on the measurements taken of the attribute of the IC for the selected circuit elements to determine scaling factors for the selected circuit elements, and transforming the determined scaling factors for the selected circuit elements to generate an identification number of the IC. Additional variants and embodiments may also be disclosed.

Claims

1. A method to identify integrated circuits, the method comprising:

evaluating measurements of one or more attributes for one or more circuit elements of an integrated circuit, wherein the measurements are associated with corresponding input vectors applied to the integrated circuit;

determining scaling factors for the selected one or more circuit elements, wherein the scaling factors reflect a relationship between nominal values for the attributes and measured values for the attributes;

transforming the determined scaling factors for the selected one or more circuit elements to generate transformed scaling factors; and

generating an identification number of the integrated circuit based on the transformed scaling factors.

2. The method of claim 1, wherein transforming the determined scaling factors comprises:

selecting one or more of the scaling factors; and

mapping the one or more selected scaling factors to corresponding binary codes;

wherein generating the identification number includes generating the identification number of the integrated circuit using the mapped binary codes.

3. The method of claim 1, further comprising:

selecting a first set of one or more circuit elements that are to be used to generate the identification number;

identifying a first set of one or more scaling factors corresponding to the first set of circuit elements;

mapping the first set of one or more scaling factors to a first binary value;

selecting a second set of one or more circuit elements that are not to be used to generate the identification number; and

mapping the second set of one or more circuit elements to a second binary value, wherein generating the identification number includes generating an indicator string based on the first and second binary values.

4. The method of claim 1, wherein transforming comprises:

generating a probability distribution function of the scaling factors;

partitioning a graph of the probability distribution function into individual segments such that each of the individual segments has approximately equal area or width;

assigning respective binary codes to the individual segments such that the individual segments are associated with a respective one of the binary codes; and

assigning the respective binary codes to the scaling factors included in the individual segments based on the binary codes assigned to the individual segments;

wherein generating the identification number includes generating the identification number of the integrated circuit using the binary codes assigned to the individual scaling factors.

5. The method of claim 1, further comprising evaluating a collision probability that includes a determination of a probability of a first integrated circuit having a same identification number as a second integrated circuit.

6. The method of claim 1, wherein the one or more attributes for the selected one or more circuit elements comprise at least one of a leakage current, a time delay between an input and output of the one or more circuit elements, a switching power, a parasitic capacitance, an inductance, a resistance, a gain, an offset voltage, a threshold voltage, an operating temperature, a power consumption, or an idle current.

7. The method of claim 1, wherein determination of the scaling factors includes utilizing an objective function to minimize a norm of error terms that are based at least in part on an error in the measurements.

8. A device effective to identify integrated circuits, the device comprising:

a storage unit effective to store an identification number for an integrated circuit;

a processor configured in communication with the storage unit;

the processor effective to perform or cause to be performed;

evaluate measurements of one or more attributes for one or more circuit elements of the integrated circuit, wherein the measurements are associated with corresponding input vectors applied to the integrated circuit;

determine scaling factors for the selected one or more circuit elements, wherein the scaling factors reflect a relationship between nominal values for the attributes and measured values for the attributes;

transform the determined scaling factors for the selected one or more circuit elements to generate transformed scaling factors; and

generate the identification number of the integrated circuit based on the transformed scaling factors.

9. The device of claim 8, wherein to determine the scaling factors, the processor is effective to perform or cause to be performed:

utilize an objective function to minimize a norm of error terms that are based at least in part on an error in the measurements.

10. The device of claim 8, wherein to transform the determined scaling factors, the processor is configured to perform or cause to be performed:

select one or more of the scaling factors; and

map the one or more selected scaling factors to corresponding binary codes;

wherein to generate the identification number, the processor is configured to perform or cause to be performed;

generate the identification number of the integrated circuit using the mapped binary codes.

11. The device of claim 8, wherein the processor is further configured to perform or cause to be performed:

select a first set of one or more circuit elements that are to be used to generate the identification number;

identify a first set of one or more scaling factors that correspond to the first set of circuit elements;

map the first set of one or more scaling factors to a first binary value;

select a second set of one or more circuit elements that are not to be used to generate the identification number, and

map the second set of one or more circuit elements to a second binary value;

wherein to generate the identification number, the processor is configured to perform or cause to be performed;

generate the identification number through generation of an indicator string based on the first and second binary values.

12. The device of claim 8, wherein the processor is further effective to perform or cause to be performed:

evaluate a collision probability that includes a determination of a probability of a first integrated circuit having a same identification number as a second integrated circuit.

13. The device of claim 8, wherein the one or more circuit elements comprise part of a first plurality of circuit elements, and wherein the generated identification number is a first identification number, the processor further effective to perform or cause to be performed:

evaluate a collision probability that includes a determination of a probability of a first integrated circuit having a same identification number as a second integrated circuit;

determine that the collision probability is higher than a threshold collision probability;

identify a second plurality of circuit elements based on the determination that the collision probability is higher than the threshold collision probability, wherein the second plurality of circuit elements includes more circuit elements than the first plurality of circuit elements; and

generate a second identification number of the integrated circuit, such that the second identification number has a lower collision probability than the first identification number.

14. The device of claim 8, wherein the one or more attributes for the selected one or more circuit elements comprise at least one of a leakage current, a time delay between an input and output of the one or more circuit elements, a switching power, a parasitic capacitance, an inductance, a resistance, a gain, an offset voltage, a threshold voltage, an operating temperature, a power consumption, or an idle current.

15. A combination of an integrated circuit and a device, the device effective to identify integrated circuits, the combination comprising:

the integrated circuit, wherein the integrated circuit is associated with an identification number and includes one or more circuit elements; and

the device,

the integrated circuit effective to;

receive one or more input vectors at inputs of the one or more circuit elements; and

generate outputs of the one or more circuit elements in response to the one or more input vectors;

the device effective to perform or cause to be performed;

evaluate measurements of one or more attributes for one or more circuit elements of the integrated circuit, wherein the measurements are associated with corresponding input vectors applied to the integrated circuit;

determine scaling factors for the selected one or more circuit elements, wherein the scaling factors reflect a relationship between nominal values for the attributes and measured values for the attributes;

transform the determined scaling factors for the selected one or more circuit elements to generate transformed scaling factors; and

generate the identification number of the integrated circuit based on the transformed scaling factors.

16. The combination of claim 15, wherein the one or more attributes for the selected one or more circuit elements comprise at least one of a leakage current, a time delay between an input and output of the one or more circuit elements, a switching power, a parasitic capacitance, an inductance, a resistance, a gain, an offset voltage, a threshold voltage, an operating temperature, a power consumption, or an idle current.

17. The combination of claim 15, wherein to transform the determined scaling factors, the device is configured to perform or cause to be performed:

select one or more of the scaling factors; and

map the one or more selected scaling factors to corresponding binary codes;

wherein to generate the identification number, the device is configured to perform or cause to be performed;

generate the identification number of the integrated circuit using the mapped binary codes.

18. The combination of claim 15, wherein the device is further configured to perform or cause to be performed:

select a first set of one or more circuit elements that are to be used to generate the identification number;

identify a first set of one or more scaling factors that correspond to the first set of circuit elements;

map the first set of one or more scaling factors to a first binary value;

select a second set of one or more circuit elements that are not to be used to generate the identification number; and

map the second set of one or more circuit elements to a second binary value;

wherein to generate the identification number, the device is configured to perform or cause to be performed;

generate the identification number through generation of an indicator string based on the first and second binary values.

19. The combination of claim 15, wherein to transform the determined scaling factors, the device is configured to perform or cause to be performed:

generate a probability distribution function of the scaling factors;

partition a graph of the probability distribution function into individual segments such that each of the individual segments has approximately equal area or width;

assign respective binary codes to the individual segments such that the individual segments are associated with a respective one of the binary codes; and

assign the respective binary codes to the scaling factors included in the individual segments based on the binary codes assigned to the individual segments; and

wherein to generate the identification number, the processor is configured to perform or cause to be performed;

generate the identification number of the integrated circuit using the binary codes assigned to the individual scaling factors.

20. The combination of claim 15, wherein the processor is further effective to perform or cause to be performed:

evaluate a collision probability that includes a determination of a probability of the integrated circuit having a same identification number as another integrated circuit.