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Buffer control system and method for a memory system having outstanding read and write request buffers

  • US 8,788,765 B2
  • Filed: 08/06/2013
  • Issued: 07/22/2014
  • Est. Priority Date: 01/30/2004
  • Status: Active Grant
First Claim
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1. A memory controller for use with a system memory, the memory controller comprising:

  • a flow control unit comprising;

    a first buffer control circuit configured to determine a number of outstanding memory requests of a first kind issued to the system memory; and

    a second buffer control circuit configured to determine a number of outstanding memory requests of a second kind issued to the system memory,wherein the flow control unit is configured to provide a flow control signal to control further issuance of memory requests of the first and second kinds to the system memory based on the numbers of outstanding memory requests of the first and second kinds, respectively, including enabling issuance of additional memory requests of the first kind to the system memory when the number of outstanding memory requests of the first kind is within a range and halting issuance of additional memory requests of the first kind when the number of outstanding memory requests of the first kind is outside of the range.

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