Product authentication using integrated circuits

• US 8,789,746 B2
• Filed: 01/30/2010
• Issued: 07/29/2014
• Est. Priority Date: 01/31/2009
• Status: Active Grant

• Current Assignee: Solexir Technology Incorporated
• Original Assignee: Solexir Technology Incorporated
• Inventors: Toofan, Mehrdad, Toofan, Mehzad
• Primary Examiner(s): Lee, Michael G
• Assistant Examiner(s): KELLY, RAFFERTY D
• Application Number:
  US12/697,224
• Publication Number:
  US 20100140344A1
• Time in Patent Office: 1,641 Days
• Field of Search: 235/375
• US Class Current: 235/375
• CPC Class Codes: G06K 19/07703 the interface being visual
• CPC Class Codes: G06K 19/14 the marking being sensed by radiation

Abstract

Authentication of a product could be accomplished by utilizing encryption and decryption engines onboard two integrated circuits namely a DECENC chip and a READER chip. A unique serial number in either an encrypted or un-encrypted format is programmed into eFuses, or OTP devices on board the DECENC chip where this chip is then attached to the product. During the authentication procedure, the encrypted and decrypted serial number on board the DECENC chip is transferred to the READER chip. The READER chip subsequently performs a decryption of the serial number from the first chip if this serial number is in encrypted form or performs an encryption of the serial number from the first chip if this serial number is in un-encrypted form. The READER chip then compares its result of decryption or encryption against the corresponding decrypted or encrypted versions of the serial number received from the DECENC chip. If the results of decryption or encryptions for both chips are the same, then the READER chip signals an authentic product, otherwise it will reject the product as fake.

Claims

1. A method to authenticate a product comprising:

providing a first encoding and decoding chip accompanying the product, wherein the first encoding and decoding chip is storing a serial number as a means of identifying said product; and

separately providing a second encoding and decoding chip, wherein a long term storage bit compromising of a One Time Programming (OTP) device including an eFUSE is initially programmed to either logic 0 or logic 1 on the first and the second chip preventing the chips to operate normally right after manufacturing and subsequently are activated allowing normal operation of the two chips wherein such activation requires the two chips to receive a predetermined sequence of specific vector patterns, wherein said authentication method comprises steps of;

a) the first encoding and decoding chip performs an encoding of said serial number if the serial number is decoded, or the first encoding and decoding chip performs a decoding of said serial number if the serial number is encoded; and

b) the second encoding and decoding chip performs an encoding of said serial number if the serial number is decoded, or the second encoding and decoding chip performs a decoding of said serial number if the serial number is encoded; and

c) the second encoding and decoding chip compares its result of encoding or decoding against the result of encoding or decoding from the first chip in step (a) and if the two results match the second encoding and decoding chip confirms the authenticity of the product.

2. A method in accordance with claim 1, wherein a key has been stored on both the first chip and the second chip and is used for encoding or decoding operation by both said chips.

3. A method in accordance with claim 1, wherein an opcode or other information is embedded within the serial number and is used by the first chip or the second chip to carry out the encoding or decoding operation and storing the results.

4. A method in accordance with claim 1, wherein the first chip receives its power or clock or data or instructions from the second chip via physical contacts or by wireless methods.

5. A method in accordance with claim 1, wherein the first chip has a status register or an interrupt mechanism to inform the second chip of completion of a task.

6. A method in accordance with claim 1, wherein the serial number is programmed onto the first chip using eFUSES, Poly Fuses, Metal Fuses, or similar one time programmable storage devices.

7. A method in accordance with claim 1, wherein the second chip'"'"'s authenticity is confirmed via phone or a manufacture website using an identification tag that accompanies the second chip.

8. A method in accordance with claim 1, wherein the second chip is embedded in an enclosure equipped with means to display or to announce the authenticity or information about the nature of a product provided by the second chip.

9. A method in accordance with claim 1, wherein the first and second chips use a variable of the same value to first scramble a key or the serial number and then using the key to encode or to decode the serial number.

10. A method in accordance with claim 1, wherein a specific identification pattern is programmed on the first and second chips that could be used to identify and subsequently determine the health of a particular chip.

11. A method in accordance with claim 1, wherein a second long term storage bit, comprising of a One Time Programming (OTP) device including an eFUSE, in the first chip is disabled by the second chip to prevent the first chip to function and to operate normally.

12. A method to authenticate a product comprising:

providing a product with a label containing an encoded or decoded serial number as a means of identifying said product and a first encoding and decoding chip storing the same serial number in an encoded or decoding format; and

separately providing a second encoding and decoding chip; and

a verifier entity that carries out the task of verification, wherein a long term storage bit compromising of a One Time Programming (OTP) device including an eFUSE is initially programmed to either logic 0 or logic 1 on the first and the second chip preventing the chips to operate normally right after manufacturing and subsequently are activated allowing normal operation of the two chips wherein such activation requires the two chips to receive a predetermined sequence of specific vector patterns, wherein said authentication method comprises steps of;

a) the verifier requiring the first encoding and decoding chip to perform an encoding of said serial number if the serial number is decoded, or decoding of said serial number if the serial number is encoded; and

b) the verifier requiring the second encoding and decoding chip to perform an encoding of said serial number if the serial number is decoded, or decoding of said serial number if the serial number is encoded; and

c) the verifier compares the encoding or decoding results obtained in step (a) against the encoding or decoding results obtained in step (b) and if the two results match the verifier confirms the authenticity of the product.

13. A method in accordance with claim 12, wherein a key has been stored on both the first chip and the second chip and is used for encoding or decoding operation by both said chips.

14. A method in accordance with claim 12, wherein an opcode or other information is embedded within the serial number and is used by the first chip or the second chip to carry out the encoding or decoding operation and storing the results.

15. A method in accordance with claim 12, wherein the first and second chips receive their power or clock or data or instructions from the verifier via physical contacts or by wireless methods.

16. A method in accordance with claim 12, wherein the first and second chips have status register or an interrupt mechanism to inform the verifier of completion of a task.

17. A method in accordance with claim 12, wherein the serial number is programmed onto the first chip using eFUSES, Poly Fuses, Metal Fuses, or similar one time programmable storage devices.

18. A method in accordance with claim 12, wherein the second chip'"'"'s authenticity is confirmed via phone or a manufacture website using an identification tag that accompanies the second chip.

19. A method in accordance with claim 12, wherein the second chip'"'"'s authenticity is confirmed via an identification tag that has been programmed into the second chip, whereby the second chip will be instructed by the verifier to encode or to decode this identification tag and the result would be communicated via phone or a manufacture website for the authentication of the second chip.

20. A method in accordance with claim 12, wherein the verifier is equipped with means to display or to announce the authenticity or information about the nature of a product provided by the second chip and the first chip.

21. A method in accordance with claim 12, wherein the first and second chips use a variable of the same value to first scramble a key or the serial number and then using the key to encode or to decode the serial number.

22. A method in accordance with claim 12, wherein a specific identification pattern is programmed on the first and second chips that could be used to identify and subsequently determine the health of a particular chip.

23. A method in accordance with claim 12, wherein, a second long term storage bit, comprising of a One Time Programming (OTP) device including an eFUSE, in the first chip is disabled by the verifier to prevent the first chip to function and to operate normally.