Method for manufacturing display device

• US 8,790,942 B2
• Filed: 02/07/2013
• Issued: 07/29/2014
• Est. Priority Date: 12/25/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Tsuji, Takahiro, Moriya, Koji
• Primary Examiner(s): Matthews, Colleen
• Assistant Examiner(s): JEFFERSON, QUOVAUNDA
• Application Number:
  US13/761,421
• Publication Number:
  US 20130149798A1
• Time in Patent Office: 537 Days
• Field of Search: 438/22, 438/26, 438/29, 438/30, 438/38, 438/126, 438/127, 438/149, 438/151, 438/455, 438/458, 438/689, 438/690, 438/795, 438/798, 438/800, 438/FOR.407, 438/FOR.410, 438/FOR.415, 438/FOR.416, 438/FOR.417, 349/187, 349/189, 349/190, 349/192, 257/E21.328, 257/E21.333, 257/E21.411
• US Class Current: 438/30
• CPC Class Codes: G09G 2300/043 Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
• CPC Class Codes: G09G 2320/0252 Improving the response speed
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/08 Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/344 based on particles moving in a fluid or in a gas, e.g. electrophoretic devices electrophoretic devices per se G02F1/167
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination

Abstract

One object is to provide a method for manufacturing a display device in which shift of the threshold voltage of a thin film transistor including an oxide semiconductor layer can be suppressed even when ultraviolet light irradiation is performed in the process for manufacturing the display device. In the method for manufacturing a display device, ultraviolet light irradiation is performed at least once, a thin film transistor including an oxide semiconductor layer is used for a switching element, and heat treatment for repairing damage to the oxide semiconductor layer caused by the ultraviolet light irradiation is performed after all the steps of ultraviolet light irradiation are completed.

Claims

1. A method for manufacturing a display device, the method comprising the steps of:

forming a transistor over a first substrate, wherein the transistor comprises an oxide semiconductor layer comprising a channel formation region;

attaching a second substrate to the first substrate with a sealant between the second substrate and the first substrate, wherein the sealant comprises an ultraviolet curable resin;

irradiating the sealant with an ultraviolet light;

forming a liquid crystal layer in a region surrounded by the sealant after irradiating the sealant with the ultraviolet light;

realigning an orientation of the liquid crystal layer by performing a first heat treatment on the liquid crystal layer and decreasing a temperature of the liquid crystal layer after performing the first heat treatment on the liquid crystal layer; and

performing a second heat treatment on the oxide semiconductor layer after realigning the orientation of the liquid crystal layer.

2. The method according to claim 1,

wherein the second heat treatment is performed at greater than or equal to 50°

C. and less than or equal to 300°

C.

3. The method according to claim 1,

wherein the second heat treatment is performed at greater than or equal to 125°

C. and less than or equal to 250°

C.

4. The method according to claim 1,

wherein the second heat treatment is performed for greater than or equal to 2 hours and less than or equal to 15 hours.

5. The method according to claim 1, wherein a damage to the oxide semiconductor layer caused by the ultraviolet light is repaired by the second heat treatment.

6. The method according to claim 1, wherein the second heat treatment is performed by an electric furnace.

7. The method according to claim 1, wherein the oxide semiconductor layer comprises indium.

8. A method for manufacturing a display device, the method comprising the steps of:

forming a pixel portion and a driver circuit portion over a first substrate, wherein each of the pixel portion and the driver circuit portion comprises a transistor comprising an oxide semiconductor layer comprising a channel formation region;

attaching a second substrate to the first substrate with a sealant between the second substrate and the first substrate so that the sealant and the driver circuit portion overlap each other, wherein the sealant comprises an ultraviolet curable resin;

irradiating the sealant with an ultraviolet light;

forming a liquid crystal layer in a region surrounded by the sealant after irradiating the sealant with the ultraviolet light;

realigning an orientation of the liquid crystal layer by performing a first heat treatment on the liquid crystal layer and decreasing a temperature of the liquid crystal layer after performing the first heat treatment on the liquid crystal layer; and

performing a second heat treatment on the oxide semiconductor layer after realigning the orientation of the liquid crystal layer.

9. The method according to claim 8,

wherein the second heat treatment is performed at greater than or equal to 50°

C. and less than or equal to 300°

C.

10. The method according to claim 8,

wherein the second heat treatment is performed at greater than or equal to 125°

C. and less than or equal to 250°

C.

11. The method according to claim 8,

wherein the second heat treatment is performed for greater than or equal to 2 hours and less than or equal to 15 hours.

12. The method according to claim 8, wherein a damage to the oxide semiconductor layer caused by the ultraviolet light is repaired by the second heat treatment.

13. The method according to claim 8, wherein the second heat treatment is performed by an electric furnace.

14. The method according to claim 8, wherein the oxide semiconductor layer comprises indium.