Voltage regulator with optimal efficiency selection and a master-slave zero cross detection configuration

• US 8,791,680 B2
• Filed: 12/17/2012
• Issued: 07/29/2014
• Est. Priority Date: 04/14/2010
• Status: Active Grant

• Current Assignee: Dell Products LP (Dell Technologies Inc.)
• Original Assignee: Dell Products LP (Dell Technologies Inc.)
• Inventors: Luo, Shiguo, Lambert, Colin
• Primary Examiner(s): Tran, Nguyen
• Application Number:
  US13/716,823
• Publication Number:
  US 20130099766A1
• Time in Patent Office: 589 Days
• Field of Search: 323/222, 323/271, 323/282, 323/283, 323/284, 323/285
• US Class Current: 323/285
• CPC Class Codes: G05F 1/10 Regulating voltage or current G05F1/02 takes precedence; for electric railways B60M3/02
• CPC Class Codes: H02M 1/0032 Control circuits allowing low power mode operation, e.g. in standby mode
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A voltage regulator includes a first phase power stage, a second phase power stage, and a controller. The first phase power stage includes a zero cross detection circuit configured to measure a current level for the first phase power stage, and to cause a diode emulation state in the first phase power stage when the current level is substantially equal to zero. The second phase power stage is in communication with the zero cross detection circuit, and configured to enter the diode emulation state in response to receiving a signal from the zero cross detection circuit. The controller is coupled to the first phase power stage and to the second phase power stage. The controller is configured to measure an output current of the voltage regulator and to activate the second phase power stage when the output current is above a first threshold current level.

Claims

1. A voltage regulator comprising:

a first phase power stage connected in parallel with a second phase power stage, the first phase power stage including;

a first high side transistor configured to activate and deactivate to regulate an input voltage; and

a first low side transistor coupled to the first high side transistor, the first low side transistor configured to deactivate in response to a signal from a zero cross detection circuit of the second phase power stage, wherein the signal indicates that a current level in the second phase power stage is substantially equal to zero;

wherein the first phase power stage is configured to be activated in response to an output current being above a first threshold current level.

2. The voltage regulator of claim 1 further comprising:

a third phase power stage including;

a second high side transistor configured to activate and deactivate to regulate the input voltage; and

a second low side transistor coupled to the second high side transistor, the second low side transistor configured to deactivate in response to the signal from the zero cross detection circuit.

3. The voltage regulator of claim 2 further comprising:

a controller coupled to the first phase power stage, the controller configured to measure the output current of the voltage regulator and to activate the first phase power stage in response the output current being above the first threshold current level.

4. The voltage regulator of claim 3 wherein the controller is further configured to enable the third phase power stage in response to the output current being above a second threshold current level.

5. The voltage regulator of claim 1 wherein the first phase power stage further includes:

a drive circuit coupled to the first high side transistor and to the first low high side transistor, the drive circuit configured to control the first high side transistor and the first low side transistor based on the signal from the zero cross detection circuit.

6. The voltage regulator of claim 1 wherein the current level is measured in a low side transistor of the second phase power stage.

7. The voltage regulator of claim 1 wherein the current level is measured based on a current through an inductor.

8. A voltage regulator comprising:

a first phase power stage in communication with a zero cross detection circuit of a second phase power stage, the first phase power stage configured to enter a diode emulation state in response to a signal from the zero cross detection circuit, wherein the signal indicates that a current level in the second phase power stage is substantially equal to zero;

wherein the first phase power stage is configured to be activated in response to an output current being above a first threshold current level.

9. The voltage regulator of claim 8 further comprising:

a third phase power stage in communication with the zero cross detection circuit, the third phase power stage configured to enter the diode emulation state in response to receiving the signal from the zero cross detection circuit.

10. The voltage regulator of claim 9 further comprising:

a controller coupled to the first phase power stage, the controller configured to measure the output current of the voltage regulator and to activate the first phase power stage in response to the output current being above the first threshold current level.

11. The voltage regulator of claim 10 wherein the controller is further configured to enable the third phase power stage in response to the output current being above a second threshold current level.

12. The voltage regulator of claim 8 wherein the current level is measured in a low side transistor of the second phase power stage.

13. The voltage regulator of claim 8 wherein the current level is measure based on a current through an inductor.

14. A method comprising:

enabling a first phase power stage in a voltage regulator;

detecting that a current in a second phase power stage is below a zero detect threshold;

setting a flag in the voltage regulator in response to the current being below the zero detect threshold;

detecting, in the first phase power stage, that the flag is set; and

disabling a low side transistor in the first phase power stage when the flag is set.

15. The method of claim 14 further comprising:

detecting that the current is above the zero detect threshold;

unsetting the flag in the voltage regulator in response to the current being above the zero detect threshold;

detecting, in the first phase power stage, that the flag is unset;

enabling the low side transistor when the flag is unset.

16. The method of claim 15 further comprising:

detecting that an output current of the voltage regulator is below a first threshold current; and

disabling a third phase power stage in response to the output current of the voltage regulator being below the first threshold current.

17. The method of claim 16 further comprising:

detecting that the output current of the voltage regulator is above the first threshold current;

enabling the third phase power stage in response to the output current of the voltage regulator being above the first threshold current; and

enabling a low side transistor in the third phase power stage when the flag is unset.

18. The method of claim 16 further comprising:

detecting that the current in the second phase power stage is below a second threshold current; and

disabling the first phase power in response to the current in the second phase power stage being below the second threshold current.

19. The method of claim 18 wherein the second threshold current is less than the first threshold current.

20. The method of claim 14 wherein the current level is measure based on a current through an inductor.