Vertically oriented semiconductor device and shielding structure thereof

• US 8,791,784 B2
• Filed: 08/18/2011
• Issued: 07/29/2014
• Est. Priority Date: 08/18/2011
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Cho, Hsiu-Ying
• Primary Examiner(s): Chan, Tsz
• Application Number:
  US13/212,976
• Publication Number:
  US 20130043968A1
• Time in Patent Office: 1,076 Days
• Field of Search: 336/200, 336/234
• US Class Current: 336/200
• CPC Class Codes: H01L 23/5223 Capacitor integral with wiring layers
• CPC Class Codes: H01L 23/5225 Shielding layers formed together with wiring layers
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base

Abstract

The present disclosure provides a semiconductor device. The semiconductor device includes a substrate that spans in an X-direction and a Y-direction that is orthogonal to the X-direction. The semiconductor device includes an interconnect structure formed over the substrate in a Z-direction that is orthogonal to both the X-direction and the Y-direction. The interconnect structure includes a plurality of metal lines interconnected together in the Z-direction by a plurality of vias. The interconnect structure contains a transformer device that includes a primary coil and a secondary coil. The primary coil and the secondary coil are each wound at least partially in the Z-direction.

Claims

1. A semiconductor device, comprising:

a substrate having a surface that is defined by a first axis and a second axis that is perpendicular to the first axis; and

a transformer disposed over the surface of the substrate, the transformer including a first coil and a second coil, the first and second coils having respective winding orientations that are non-parallel to the surface of the substrate, wherein;

the transformer is implemented within an interconnect structure that is disposed over the substrate, the interconnect structure having a plurality of interconnect layers;

the first coil includes a plurality of first interconnect lines that are disposed in a first subset of interconnect layers and that are interconnected together by a plurality of first vias, the first coil including a first port defined by adjacently-located first and second distal ends of the first coil;

the second coil includes a plurality of second interconnect lines that are disposed in a second subset of interconnect layers and that are interconnected together by a plurality of second vias, the second coil including a second port defined by adjacently-located third and fourth distal ends of the second coil;

at least some of the first interconnect lines belonging to different interconnect layers are vertically aligned with one another; and

at least some of the second interconnect lines belonging to different interconnect layers are vertically aligned with one another.

2. The semiconductor device of claim 1, wherein the winding orientations of the first and second coils are approximately perpendicular to the surface of the substrate.

3. The semiconductor device of claim 1, wherein the winding orientations of the first and second coils are each defined by:

one of the first and second axes; and

a third axis that is orthogonal to both the first and second axes.

4. The semiconductor device of claim 1, wherein the transformer has an associated magnetic field that is approximately parallel to the surface of the substrate.

5. The semiconductor device of claim 4, wherein the substrate is substantially free of an eddy current induced by the magnetic field.

6. The semiconductor device of claim 1, wherein widths of the first interconnect lines differ from widths of the second interconnect lines by a factor that is no less than two.

7. The semiconductor device of claim 1, wherein the first and second coils have different numbers of windings.

8. A semiconductor device, comprising:

a substrate that spans in an X-direction and a Y-direction that is orthogonal to the X-direction; and

an interconnect structure formed over the substrate in a Z-direction that is orthogonal to both the X-direction and the Y-direction, the interconnect structure including a plurality of metal lines interconnected together in the Z-direction by a plurality of vias, the interconnect structure containing a transformer device that includes a primary coil and a secondary coil, the primary coil and the secondary coil each being wound at least partially in the Z-direction, wherein the primary coil has a first distal end and a second distal end, and wherein the secondary coil has a third distal end and a fourth distal end, wherein the first and second distal ends are disposed adjacent to one another, and wherein the third and fourth distal ends are disposed adjacent to one another.

9. The semiconductor device of claim 8, wherein the primary coil and the secondary coil each include a winding direction that is substantially perpendicular to a plane defined by the X-direction and the Y-direction.

10. The semiconductor device of claim 8, wherein the transformer device induces a magnetic field that extends at least partially along a plane defined by the X-direction and the Y-direction.

11. The semiconductor device of claim 8, wherein the primary coil and the secondary coil each include a respective group of the metal lines and a respective group of the vias of the interconnect structure.

12. The semiconductor device of claim 11, wherein the group of metal lines of the primary coil have different width sizes than the group of metal lines of the secondary coil.

13. The semiconductor device of claim 11, wherein the secondary coil is at least partially positioned between an upper portion of the primary coil and a lower portion of the primary coil, wherein the upper and lower portions are defined with respect to the Z-direction.

14. The semiconductor device of claim 11, wherein

at least some of the metal lines in the primary coil are distributed in a first subset of different metal layers and are vertically aligned with one another;

or

at least some of the metal lines in the secondary coil are distributed in a second subset of different metal layers and are vertically aligned with one another.

15. A method of fabricating a semiconductor device, comprising:

providing a substrate having a surface that is defined by a first axis and a second axis that is perpendicular to the first axis; and

forming an interconnect structure over the surface of the substrate, the interconnect structure having a plurality of conductive lines interconnected by a plurality of vias, wherein the forming the interconnect structure includes forming a transformer device as a part of the interconnect structure, wherein the transformer device includes a first coil and a second coil that each have a winding orientation that is defined at least in part by a third axis that is perpendicular to the surface of the substrate;

wherein;

the first coil includes a first subset of vertically-aligned conductive lines from different conductive layers, the first subset of vertically-aligned conductive lines being interconnected by a first subset of vias;

the first coil includes two distal ends that are located adjacent to one another;

the second coil includes a second subset of vertically-aligned conductive lines from different conductive layers, the second subset of vertically-aligned conductive lines being interconnected by a second subset of vias; and

the second coil includes two distal ends that are located adjacent to one another.

16. The method of claim 15, wherein the forming the transformer device is carried out in a manner such that the winding orientation is perpendicular to the surface of the substrate.

17. The method of claim 15, wherein the forming the transformer device is carried out in a manner such that:

the first subset of conductive lines are parallel to the second subset of conductive lines, and the first and second coils have different numbers of turns.

18. The method of claim 17, wherein the first subset of conductive lines are wider than the second subset of conductive lines by a factor that is greater than two.

19. The method of claim 17, wherein the second subset of conductive lines are disposed in between a topmost conductive line in the first subset and a bottommost conductive line in the first subset.