Oscillator

• US 8,792,845 B2
• Filed: 05/28/2013
• Issued: 07/29/2014
• Est. Priority Date: 03/16/2010
• Status: Active Grant

• Current Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: Sapone, Giuseppina, Italia, Alessandro, Ragonese, Egidio, Palmisano, Giuseppe
• Primary Examiner(s): LE, THANH C
• Application Number:
  US13/903,679
• Publication Number:
  US 20130251076A1
• Time in Patent Office: 427 Days
• Field of Search: 455/208, 455/255, 455256-258, 455/260, 455/264, 455/307, 455/261, 455/262, 331/15, 331/177.R, 331/177.FE
• US Class Current: 455/262
• CPC Class Codes: H03B 5/1218 the generator being of the balanced type
• CPC Class Codes: H03B 5/1231 the amplifier comprising one or more bipolar transistors
• CPC Class Codes: H03B 5/1243 the means comprising voltage variable capacitance diodes
• CPC Class Codes: H03B 5/1296 the feedback circuit comprising a transformer
• CPC Class Codes: H03L 7/099 concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H04B 1/26 for superheterodyne receivers multiple frequency-changing H03D7/16

Abstract

An oscillator is described, comprising at least one transistor having a first terminal connected to a power supply voltage. The oscillator comprises at least one inductive element connected to a second terminal of the transistor and to a bias voltage and at least one capacitive element coupled between a third terminal of the transistor and ground. The oscillator further comprises means to collect the output signal of the oscillator on the second terminal of the transistor. The oscillator is of the millimeter wave type, i.e., both the inductive element and the capacitive element are sized such that the oscillation frequency is between 30 and 300 gigahertz.

Claims

1. An oscillator comprising:

a power supply voltage terminal;

a bias voltage terminal;

a ground terminal;

a first transistor having a control terminal and first and second conduction terminals, the first conduction terminal being coupled to the power supply voltage terminal;

a first inductive element coupled between the control terminal of the transistor and the bias voltage terminal;

a first capacitive element coupled between the second conduction terminal of the transistor and the ground terminal; and

an output circuit configured to receive a control signal from the control terminal of the transistor and output an output signal based on the control signal.

2. An oscillator according to claim 1, said capacitive element is a variable capacitor configured to be controlled by an external voltage signal.

3. An oscillator according to claim 1, further comprising:

a second transistor coupled to the first transistor in a differential structure, the second transistor having a control terminal and first and second conduction terminals, the first conduction terminal of the second transistor being coupled to said power supply voltage terminal; and

a second capacitive element coupled between the second conduction terminal of the second transistor and the ground terminal, wherein;

the inductive element is arranged between the control terminals of the first and second transistors; and

the output circuit is configured to produce a differential output signal of said oscillator based on control signals from the control terminals of the first and second transistors.

4. An oscillator according to claim 3, wherein said first inductor is a central socket inductor having a central socket configured to be coupled to said bias voltage.

5. An oscillator according to claim 3, comprising a second inductor coupled between the first inductor and the control terminal of the second transistor, the bias voltage terminal being a common terminal at which said first and second inductors are connected.

6. An oscillator according to claim 3, wherein the output circuit includes:

a pair of third and fourth transistors having respective first conduction terminals coupled to said power supply voltage terminal, respective control terminals coupled respectively to the control terminals of the first and second transistors, and respective second conductive terminals coupled to the ground terminal;

first and second impedances respectively coupled between the ground terminal and the second conduction terminals of the third and fourth transistors; and

differential output terminals respectively coupled to the second conduction terminals of the third and fourth transistors and configured to provide the differential output signal of the oscillator.

7. An oscillator according to claim 3, comprising:

a first resistor coupled between the first capacitive element and the ground reference terminal;

a second resistor coupled between the second capacitive element and the ground reference terminal;

a control voltage terminal;

a first variable capacitance coupled between the control voltage terminal and a first node coupling the first resistor to the first capacitive element; and

a second variable capacitance coupled between the control voltage terminal and a second node coupling the second resistor to the second capacitive element.

8. An oscillator according to claim 1, wherein the first inductor is a primary inductor of a transformer arranged between the control terminals of the first and second transistors, said primary inductor being a central socket inductor having a central socket coupled to said bias voltage, said output circuit including a secondary inductor of the transformer, the secondary inductor having terminals configured to provide the output signal of the oscillator.

9. An oscillator according to claim 1, wherein said first capacitive element and said first inductive element are sized to provide an oscillation frequency of the oscillator between 30 and 300 gigahertz.

10. An oscillator according to claim 1, wherein said first transistor is a bipolar transistor, said first conduction terminal is a collector terminal, said control terminal is a base terminal, and said second terminal is an emitter terminal of the bipolar transistor.

11. A phase-lock loop, comprising:

a phase detector having an input and an output; and

an oscillator having an input coupled to the output of the phase detector and output feedback coupled to the input of the phase detector, the oscillator including;

a power supply voltage terminal;

a bias voltage terminal;

a ground terminal;

a first transistor having a control terminal and first and second conduction terminals, the first conduction terminal being coupled to the power supply voltage terminal;

a first inductive element coupled between the control terminal of the transistor and the bias voltage terminal;

a first capacitive element coupled between the second conduction terminal of the transistor and the ground terminal; and

an output circuit configured to receive a control signal from the control terminal of the transistor and output an output signal based on the control signal.

12. A phase-lock loop according to claim 11, wherein the oscillator includes:

a second transistor coupled to the first transistor in a differential structure, the second transistor having a control terminal and first and second conduction terminals, the first conduction terminal of the second transistor being coupled to said power supply voltage terminal; and

a second capacitive element coupled between the second conduction terminal of the second transistor and the ground terminal, wherein;

the inductive element is arranged between the control terminals of the first and second transistors; and

the output circuit is configured to produce a differential output signal of said oscillator based on control signals from the control terminals of the first and second transistors.

13. A phase-lock loop according to claim 12, comprising a second inductor coupled between the first inductor and the control terminal of the second transistor, the bias voltage terminal being a common terminal at which said first and second inductors are connected.

14. A phase-lock loop according to claim 12, wherein the output circuit includes:

a pair of third and fourth transistors having respective first conduction terminals coupled to said power supply voltage terminal, respective control terminals coupled respectively to the control terminals of the first and second transistors, and respective second conductive terminals coupled to the ground terminal;

first and second impedances respectively coupled between the ground terminal and the second conduction terminals of the third and fourth transistors; and

differential output terminals respectively coupled to the second conduction terminals of the third and fourth transistors and configured to provide the differential output signal of the oscillator.

15. A phase-lock loop according to claim 11, wherein the first inductor is a primary inductor of a transformer arranged between the control terminals of the first and second transistors, said primary inductor being a central socket inductor having a central socket coupled to said bias voltage, said output circuit including a secondary inductor of the transformer, the secondary inductor having terminals configured to provide the output signal of the oscillator.

16. A radio communication apparatus, comprising:

a receiver; and

a phase-lock loop coupled to the receiver, the phase-lock loop including;

a phase detector having an input and an output; and

an oscillator having an input coupled to the output of the phase detector and output feedback coupled to the input of the phase detector, the oscillator including;

a power supply voltage terminal;

a bias voltage terminal;

a ground terminal;

a first transistor having a control terminal and first and second conduction terminals, the first conduction terminal being coupled to the power supply voltage terminal;

a first inductive element coupled between the control terminal of the transistor and the bias voltage terminal;

a first capacitive element coupled between the second conduction terminal of the transistor and the ground terminal; and

an output circuit configured to receive a control signal from the control terminal of the transistor and output an output signal based on the control signal.

17. A radio communication apparatus according to claim 16, wherein the oscillator includes:

a second transistor coupled to the first transistor in a differential structure, the second transistor having a control terminal and first and second conduction terminals, the first conduction terminal of the second transistor being coupled to said power supply voltage terminal; and

a second capacitive element coupled between the second conduction terminal of the second transistor and the ground terminal, wherein;

the inductive element is arranged between the control terminals of the first and second transistors; and

the output circuit is configured to output a differential output signal of said oscillator based on control signals from the control terminals of the first and second transistors.

18. A radio communication apparatus according to claim 17, comprising a second inductor coupled between the first inductor and the control terminal of the second transistor, the bias voltage terminal being a common terminal at which said first and second inductors are connected.

19. A radio communication apparatus according to claim 17, wherein the output circuit includes:

a pair of third and fourth transistors having respective first conduction terminals coupled to said power supply voltage terminal, respective control terminals coupled respectively to the control terminals of the first and second transistors, and respective second conductive terminals coupled to the ground terminal;

first and second impedances respectively coupled between the ground terminal and the second conduction terminals of the third and fourth transistors; and

differential output terminals respectively coupled to the second conduction terminals of the third and fourth transistors and configured to provide a differential output signal of the oscillator.

20. A radio communication apparatus according to claim 16, wherein the first inductor is a primary inductor of a transformer arranged between the control terminals of the first and second transistors, said primary inductor being a central socket inductor having a central socket coupled to said bias voltage, said output circuit including a secondary inductor of the transformer, the secondary inductor having terminals configured to provide the output signal of the oscillator.