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Fan out build up substrate stackable package and method

  • US 8,796,561 B1
  • Filed: 10/05/2009
  • Issued: 08/05/2014
  • Est. Priority Date: 10/05/2009
  • Status: Active Grant
First Claim
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1. A fan out build up substrate stackable package comprising:

  • an integrated circuit chip comprising an active surface comprising a bond pad;

    a package body directly contacting and enclosing sides of the integrated circuit chip, the package body comprising a first surface coplanar with the active surface of the integrated circuit chip;

    a first buildup dielectric layer comprising a first surface applied to the active surface of the integrated circuit chip and the first surface of the package body;

    a first circuit pattern electrically connected to the bond pad, the first circuit pattern comprising a via capture pad formed within the first buildup dielectric layer and a trace embedded in the first buildup dielectric layer at a second surface of the first buildup dielectric layer; and

    a via capture pad aperture extending through the package body but not through the first buildup dielectric layer and exposing the via capture pad, wherein the package body further comprises a second surface, the via capture pad aperture extending from the second surface to and ending at the first surface of the package body;

    further comprising a backside warpage control layer applied to the second surface of the package body.

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