Method of detecting data transmission errors in a CAN controller, and a CAN controller for carrying out the method

• US 8,799,738 B2
• Filed: 01/08/2010
• Issued: 08/05/2014
• Est. Priority Date: 10/20/2001
• Status: Active Grant

• Current Assignee: Robert Bosch GmbH
• Original Assignee: Robert Bosch GmbH
• Inventors: Emde, Christoph, Hesselbarth, Johannes, Springer, Alexander
• Primary Examiner(s): Torres, Joseph D
• Application Number:
  US12/655,841
• Publication Number:
  US 20100162090A1
• Time in Patent Office: 1,670 Days
• Field of Search: 714/758, 714/763
• US Class Current: 714/758
• CPC Class Codes: H04L 1/242 by comparing a transmitted test signal with a locally generated replica
• CPC Class Codes: H04L 12/40032 Details regarding a bus interface enhancer
• CPC Class Codes: H04L 12/4135 using bit-wise arbitration
• CPC Class Codes: H04L 2012/40215 Controller Area Network CAN

Abstract

A method of detecting data transmission errors in a CAN controller includes generating at least one check bit that is verifiable for ensuring the consistency of the transmitted data. A CAN controller that ensures continuous error monitoring during data transmission includes an interface unit for exchanging data with a CAN bus, a memory unit for storing received data and data to be transmitted, and an electronic unit for controlling data transmission between the memory unit and the interface unit. The interface unit of the CAN controller has an arrangement for generating check bits for received data and for verifying check bits for data to be transmitted.

Claims

1. A CAN controller for a motor vehicle, comprising:

an interface unit adapted to exchange data with a CAN bus;

a memory unit adapted to store received data and data to be transmitted; and

an electronic unit to control a data transmission between the memory unit and the interface unit;

wherein the interface unit includes a first arrangement configured to generate at least one check bit for data received from the CAN bus and a second arrangement configured to verify at least one other check bit for data to be transmitted on the CAN bus, and wherein the second arrangement is configured to verify the at least one other check bit only if the data to be transmitted on the CAN bus is safety-related data regarding vehicle safety systems of the motor vehicle.

2. The CAN controller of claim 1, wherein the memory unit includes a RAM chip that includes at least one certain memory area corresponding to each possible item of received data and the data to be transmitted.

3. The CAN controller of claim 1, wherein the electronic unit includes a state machine.

4. The CAN controller of claim 1, further comprising a bus interface having an internal logic that is adapted to transmit the data among the interface unit, the memory unit, the electronic unit, and a microprocessor.

5. A control unit for a motor vehicle, comprising:

a CAN controller including an interface unit to exchange data with a CAN bus, a first memory unit to store received data and data to be transmitted, and an electronic unit to control a data transmission between the memory unit and the interface unit;

a microprocessor; and

a memory device;

wherein the interface unit includes a first arrangement configured to generate at least one check bit for data received from the CAN bus and a second arrangement configured for verifying at least one other check bit for data to be transmitted on the CAN bus, and wherein the second arrangement is configured to verify the at least one other check bit only if the data to be transmitted on the CAN bus are safety-related data regarding vehicle safety systems of the motor vehicle; and

wherein the microprocessor includes a third arrangement configured to generate the at least one other check bit and verify the at least one check bit, and wherein the microprocessor is configured to verify the at least one check bit only if the data received from the CAN bus are safety-related data regarding vehicle safety systems of the motor vehicle.

6. The control unit of claim 5, wherein the microprocessor and the CAN controller are integrated into one chip.