Display device and method for manufacturing the same

• US 8,803,154 B2
• Filed: 02/10/2014
• Issued: 08/12/2014
• Est. Priority Date: 12/10/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kuwabara, Hideaki
• Primary Examiner(s): Malsawma, Lex
• Application Number:
  US14/176,242
• Publication Number:
  US 20140151696A1
• Time in Patent Office: 183 Days
• Field of Search: 438/34, 257/59, 257/E33.062
• US Class Current: 257/59
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence

Abstract

A conductive layer to be a gate electrode, an insulating layer to be a gate insulating layer, a semiconductor layer, and an insulating layer to be a channel protective layer, which are each included in a transistor, are successively formed without exposure to the air. A gate electrode (including another electrode or a wiring which is formed in the same layer) and an island-like semiconductor layer are formed through one photolithography step. A display device is manufactured through four photolithography steps including the photolithography step, a photolithography step of forming a contact hole, a photolithography step of forming a source electrode and a drain electrode (including another electrode or a wiring which is formed in the same layer), and a photolithography step of forming a pixel electrode (including another electrode or a wiring which are formed in the same layer).

Claims

1. A display device comprising:

a gate electrode;

a semiconductor layer;

a gate insulating layer between the gate electrode and the semiconductor layer;

an insulating layer in contact with the semiconductor layer;

a source electrode electrically connected to the semiconductor layer through a first contact hole in the insulating layer;

a drain electrode electrically connected to the semiconductor layer through a second contact hole in the insulating layer; and

a pixel electrode electrically connected to the drain electrode,

wherein side surfaces of the gate insulating layer, the semiconductor layer, and the insulating layer on one side are substantially aligned with one another.

2. The display device according to claim 1,

wherein the semiconductor layer overlaps the gate electrode, and

wherein an end portion of the gate electrode is projected outside an end portion of the semiconductor layer.

3. The display device according to claim 1, wherein the semiconductor layer is an oxide semiconductor layer.

4. The display device according to claim 1, wherein at least one of the gate electrode, the source electrode, and the drain electrode comprises a material containing copper.

5. The display device according to claim 1, further comprising a base layer below the gate electrode.

6. A display device comprising:

a transistor comprising;

a gate electrode;

a gate insulating layer over the gate electrode;

a semiconductor layer over the gate insulating layer;

a first insulating layer over the semiconductor layer;

a second insulating layer over the first insulating layer;

a source electrode over the second insulating layer and electrically connected to the semiconductor layer through a first contact hole in the first insulating layer and the second insulating layer; and

a drain electrode over the second insulating layer and electrically connected to the semiconductor layer through a second contact hole in the first insulating layer and the second insulating layer; and

a capacitor electrically connected to the transistor; and

a pixel electrode electrically connected to the drain electrode,

wherein side surfaces of the gate insulating layer, the semiconductor layer, and the first insulating layer of the transistor on one side are substantially aligned with one another, and

wherein the capacitor comprises a capacitor wiring, the drain electrode and the second insulating layer between the capacitor wiring and the drain electrode.

7. The display device according to claim 6,

wherein the semiconductor layer overlaps the gate electrode, and

wherein an end portion of the gate electrode is projected outside an end portion of the semiconductor layer.

8. The display device according to claim 6, wherein the semiconductor layer is an oxide semiconductor layer.

9. The display device according to claim 6, wherein at least one of the gate electrode, the source electrode, and the drain electrode comprises a material containing copper.

10. The display device according to claim 6, further comprising a base layer below the gate electrode.