Adaptive voltage range management in non-volatile memory

• US 8,804,415 B2
• Filed: 06/19/2012
• Issued: 08/12/2014
• Est. Priority Date: 06/19/2012
• Status: Expired due to Fees

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Fusion-IO Incorporated (Western Digital Corporation)
• Inventors: Wood, Robert B., Hyun, Jea Woong, Sun, Hairong, Losh, Warner, Flynn, David
• Primary Examiner(s): Lappas, Jason
• Application Number:
  US13/527,418
• Publication Number:
  US 20130336072A1
• Time in Patent Office: 784 Days
• Field of Search: 365/184, 365/210.12, 365/189.09, 365/185.24
• US Class Current: 365/184
• CPC Class Codes: G11C 11/404 with one charge-transfer gate, e.g. MOS transistor, per cell
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 16/0466 comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS] G11C16/0483, G11C16/0491 take precedence
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/20 Initialising; Data preset; Chip identification
• CPC Class Codes: G11C 16/3404 Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: H01L 29/792 with charge trapping gate insulator, e.g. MNOS-memory transistors
• CPC Class Codes: H10B 12/00 Dynamic random access memory [DRAM] devices

Abstract

A method for adaptive voltage range management in non-volatile memory is described. The method includes establishing an adaptive voltage range for a memory element of an electronic memory device. The memory element includes at least two states. The adaptive voltage range comprises a lower state and an upper state. The method also includes establishing an adjustment process to implement a first adjustment of an abode characteristic of a first state and to implement a second adjustment of an abode characteristic of a second state in the adaptive voltage range in response to a trigger event, wherein the first adjustment of an abode characteristic of the first state is different from the second adjustment of an abode characteristic of the second state.

Claims

1. An electronic memory device controller, comprising:

a voltage range module configured to;

compress a voltage range for a memory element of an electronic memory device from a first voltage range to a compressed voltage range, the memory element comprising at least a first state and a second state; and

implement different adjustments to an abode characteristic of the first state and an abode characteristic of the second state, in response to a trigger event.

2. The controller of claim 1, wherein the voltage range module is further configured to adjust voltage boundaries for each of the first state and the second state according to asymmetric adjustment factors.

3. The controller of claim 1, wherein the voltage range module is further configured to adjust a width of an abode for each of the first state and the second state asymmetrically.

4. The controller of claim 1, wherein the voltage range module is further configured to make fine-grained adjustment of a read threshold voltage between the first state and the second state.

5. The controller of claim 1, wherein the trigger event comprises an error rate exceeding an error threshold.

6. The controller of claim 1, wherein the voltage range module is further configured to expand the voltage range and to adjust the first state and the second state to fit in the expanded voltage range.

7. The controller of claim 1, wherein the first state is a first programming state and the second state is a second programming state, wherein the first programming state is configured to represent at least a first bit value and the second programming state is configured to represent at least a second bit value.

8. The controller of claim 7, wherein the voltage range module is further configured to:

adjust the first programming state using first adjustment factors;

adjust the second programming state using second adjustment factors, wherein at least one adjustment factor of the second adjustment factors is different from the first adjustment factors;

adjust a first read threshold voltage for the first programming state in conjunction with the first adjustment factors; and

adjust a second read threshold voltage for the second programming state in conjunction with the second adjustment factors.

9. The controller of claim 8, wherein the voltage range module is further configured to:

shift the first programming state to a different voltage level from an initial voltage level for the first programming state while retaining the second programming state at an initial voltage level for the second programming state; and

adjust the read threshold voltage for the first programming state in conjunction with the different voltage level of the first programming state.

10. The controller of claim 1, wherein the voltage range module is further configured to:

expand the adaptive voltage range beyond the first voltage range; and

adjust a verify threshold voltage for unselected word lines (Vpass) to a voltage level that is higher than a default unselected word line voltage level.

11. A method comprising:

operating a memory element of an electronic memory device in an adaptive voltage range, wherein the memory element comprises at least a lower state and an upper state;

implementing a first adjustment of an abode characteristic of the lower state in response to a trigger event; and

implementing a second adjustment of an abode characteristic of the upper state in response to the trigger event, wherein the first adjustment is different from the second adjustment.

12. The method of claim 11, wherein implementing the first adjustment of the abode characteristic of the lower state and the second adjustment of the abode characteristic of the upper state comprises adjusting voltage boundaries for each of the lower state and the upper state according to asymmetric adjustment factors.

13. The method of claim 11, further comprising:

compressing the adaptive voltage range; and

adjusting the lower state and the upper state to fit within the compressed adaptive voltage range.

14. The method of claim 11, further comprising:

expanding the adaptive voltage range; and

adjusting the lower state and the upper state to fit within the expanded adaptive voltage range.

15. The method of claim 11, wherein implementing the first and second adjustments comprises shifting the lower and upper states from a first set of voltage levels to a second set of voltage levels in response to the trigger event, the method further comprising maintaining a width of a guard band between the lower and upper states at the second set of voltage levels equal to a width of a guard band between the lower and upper states at the first set of voltage levels.

16. The method of claim 15, further comprising:

shifting read threshold voltages for the lower and upper states to the second set of voltage levels;

maintaining abode widths for the lower and upper states from the first set of voltage levels to the second set of voltage levels; and

voltage boundaries for the lower and upper states.

17. The method of claim 15, further comprising:

monitoring a device characteristic of the electronic memory device for the trigger event; and

shifting the lower and upper states to higher voltage levels on a voltage scale in response to the trigger event.

18. An electronic memory device controller, the controller comprising:

means for establishing an adaptive voltage range for a memory element of an electronic memory device, the memory element comprising at least two states; and

means for making a first adjustment of an abode characteristic of a first state and making a different adjustment of an abode characteristic of a second state in the adaptive voltage range in response to a trigger event.

19. The controller of claim 18, further comprising:

means for adjusting a width of an abode for each of the first state and the second state asymmetrically, in which adjustment factors applied to the first state are unequal to the adjustment factors applied to the second state.

20. A method, comprising:

configuring a memory element of an electronic memory device with a first state and a second state;

configuring a voltage range module to reduce a first voltage range of the memory element to a second, compressed voltage range; and

adjusting an abode characteristic of the first state and an abode characteristic of the second state in response to a trigger event.