×

Memory for a voltage regulator circuit

  • US 8,804,440 B1
  • Filed: 03/26/2014
  • Issued: 08/12/2014
  • Est. Priority Date: 10/15/2012
  • Status: Active Grant
First Claim
Patent Images

1. A memory, comprising:

  • a memory array comprising a plurality of source lines and a plurality of memory units, wherein each one of the source lines is electrically coupled to a respective group of memory units;

    a decoder comprising an input terminal and a plurality of output terminals, the decoder being configured to have the output terminals thereof electrically coupled to the source lines, respectively; and

    a voltage regulator circuit configured to provide a supply voltage to the input terminal of the decoder and electrically coupled to the output terminals of the decoder, the voltage regulator circuit being configured to generate a feedback signal according to a signal outputted from one output terminal of the decoder and a control signal, and consequently adjust the value of the supply voltage according to the feedback signal.

View all claims
  • 2 Assignments
Timeline View
Assignment View
    ×
    ×