Digital television transmitting system and receiving system and method of processing broadcast data

• US 8,804,817 B2
• Filed: 12/19/2012
• Issued: 08/12/2014
• Est. Priority Date: 05/23/2006
• Status: Active Grant

• Current Assignee: LG Electronics, Inc. (LG Corporation)
• Original Assignee: LG Electronics, Inc. (LG Corporation)
• Inventors: Lee, Hyoung Gon, Choi, In Hwan, Kim, Byoung Gill, Song, Won Gyu, Kim, Jong Moon, Kim, Jin Woo
• Primary Examiner(s): Pham, Luu
• Assistant Examiner(s): Kabir, Jahangir
• Application Number:
  US13/720,927
• Publication Number:
  US 20130114745A1
• Time in Patent Office: 601 Days
• Field of Search: 375/240.01, 375/240.26, 375/240.27
• US Class Current: 375/240.01
• CPC Class Codes: H03M 13/09 Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
• CPC Class Codes: H03M 13/15 Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes H03M13/17 takes precedence
• CPC Class Codes: H03M 13/1515 Reed-Solomon codes
• CPC Class Codes: H03M 13/23 using convolutional codes, e.g. unit memory codes
• CPC Class Codes: H03M 13/2732 Convolutional interleaver; Interleavers using shift-registers or delay lines like, e.g. Ramsey type interleaver
• CPC Class Codes: H03M 13/2909 Product codes
• CPC Class Codes: H03M 13/2915 with an error detection code in one dimension
• CPC Class Codes: H03M 13/2918 with error correction codes in three or more dimensions, e.g. 3-dimensional product code where the bits are arranged in a cube
• CPC Class Codes: H03M 13/2927 Decoding strategies
• CPC Class Codes: H03M 13/293 with erasure setting
• CPC Class Codes: H03M 13/2933 using a block and a convolutional code H03M13/2957 takes precedence
• CPC Class Codes: H03M 13/356 Unequal error protection [UEP]
• CPC Class Codes: H03M 13/3723 using means or methods for the initialisation of the decoder
• CPC Class Codes: H04L 1/0041 Arrangements at the transmitter end
• CPC Class Codes: H04L 1/0071 Use of interleaving interleaving per se H03M13/27
• CPC Class Codes: H04N 21/235 Processing of additional data, e.g. scrambling of additional data or processing content descriptors
• CPC Class Codes: H04N 21/2383 Channel coding or modulation of digital bit-stream, e.g. QPSK modulation arrangements for detecting or preventing errors in the information received by adapting the channel coding H04L1/0009; analogue front ends or means for connecting modulators, demodulators or transceivers to a transmission line H04L27/0002
• CPC Class Codes: H04N 21/435 Processing of additional data, e.g. decrypting of additional data, reconstructing software from modules extracted from the transport stream
• CPC Class Codes: H04N 21/4382 Demodulation or channel decoding, e.g. QPSK demodulation analog front ends or means for connecting modulators, demodulators or transceivers to a transmission line H04L27/0002

Abstract

A DTV transmitting system includes a frame encoder, a randomizer, a block processor, a group formatter, a deinterleaver, and a packet formatter. The frame encoder builds an enhanced data frame and adds parity data into the data frame. The frame encoder further divides the data frame into first and second sub-frames including first and second portions of the parity data, respectively, and permutes a plurality of the first sub-frames and a plurality of the second sub-frames, respectively. The randomizer randomizes enhanced data in the permuted sub-frames, and the block processor codes the randomized data at a rate of 1/N1. The group formatter forms a group of enhanced data having one or more data regions and inserts the 1/N1 coded data into at least one of the data regions. The deinterleaver deinterleaves the group of enhanced data, and the packet formatter formats the deinterleaved data into enhanced data packets.

Claims

1. A digital television (DTV) transmitting system for processing broadcast data, the DTV transmitting system comprising:

a randomizer circuitry for randomizing enhanced data;

a Reed-Solomon (RS) frame encoder circuitry for generating an RS frame by RS encoding an RS frame payload with an RS code of (187+P,

     187) and Cyclic Redundancy Check (CRC)-encoding the RS-encoded RS frame payload, wherein the RS frame comprises (187×

N) bytes including the randomized enhanced data output from the randomizer, P bytes of RS parity data added at a bottom of each column of the (187×

N) bytes and 2 bytes of CRC data added at a right end of each row of the ((187+P)×

N) bytes, wherein P and N are greater than 1;

a block processor circuitry for encoding the data in the RS frame output from the RS frame encoder at a coding rate of 1/N1, wherein N1 is an integer greater than 1;

a group formatter circuitry for mapping a portion of the data encoded at the coding rate of 1/N1 by the block processor to a data group, wherein the group formatter adds known data sequences, main data place holders, moving picture experts group (MPEG) header place holders, and RS parity data place holders to the data group, and wherein at least two of the known data sequences are spaced 16 segments apart;

a deinterleaver circuitry for deinterleaving data of the data group output from the group formatter;

a packet formatter circuitry for removing the main data place holders and the RS parity data place holders in the deinterleaved data group output from the deinterleaver and replacing the MPEG header place holders in the deinterleaved data group output from the deinterleaver with MPEG headers having a packet identifier, in order to output enhanced data packets;

an RS encoder circuitry for inserting first RS parity data into the enhanced data packets output from the packet formatter;

an interleaver circuitry for interleaving data of the enhanced data packets including the first RS parity data output from the RS encoder;

a trellis encoder circuitry for trellis-encoding the interleaved data output from the interleaver, the trellis encoder including at least one memory that is initialized by initialization data at each start of the known data sequences; and

a compatible processor for calculating second RS parity data based on the initialization data output from the trellis encoder, to replace replacing corresponding first RS parity data of the first RS parity data with the calculated second RS parity data and outputting the second RS parity data replacing the corresponding first RS parity data to the trellis encoder.

2. The DTV transmitting system of claim 1, further comprising:

a multiplexer for multiplexing the enhanced data packets output from the packet formatter with main data packets including main data.

3. A method of processing broadcast data in a digital television (DTV) transmitting system, the method comprising:

randomizing, by a randomizer, enhanced data;

generating, by a Reed-Solomon (RS) frame encoder, an RS frame by RS encoding an RS frame payload with an RS code of (187+P,

     187) and Cyclic Redundancy Check (CRC)-encoding the RS-encoded RS frame payload, wherein the RS frame comprises (187×

N) bytes including the randomized enhanced data, P bytes of RS parity data added at a bottom of each column of the (187×

N) bytes and 2 bytes of CRC data added at a right end of each row of the ((187+P)×

N) bytes, wherein P and N are greater than 1;

encoding the data in the RS frame at a coding rate of 1/N1, wherein N1 is an integer greater than 1;

mapping a portion of the data encoded at the coding rate of 1/N1 to a data group, wherein the data group further includes known data sequences, main data place holders, moving picture experts group (MPEG) header place holders, and RS parity data place holders, and wherein at least two of the known data sequences are spaced 16 segments apart;

deinterleaving data of the data group;

removing, by a packet formatter, the main data place holders and the RS parity data place holders in the deinterleaved data group and replacing the MPEG header place holders in the deinterleaved data group with MPEG headers having a packet identifier, in order to output enhanced data packets;

inserting first RS parity data into the enhanced data packets;

interleaving data of the enhanced data packets including the first RS parity data;

trellis encoding, by a trellis encoder, the interleaved data, wherein at least one memory included in the trellis encoder is initialized by initialization data at each start of the known data sequences;

calculating second RS parity data based on the initialization data;

replacing corresponding first RS parity data of the first RS parity data with the second RS parity data; and

outputting the second RS parity data replacing the corresponding first RS parity data to the trellis encoder.

4. The method of claim 3, further comprising:

multiplexing the enhanced data packets from the packet formatter with main data packets including main data.