Data writing method for a flash memory, and controller and storage system using the same

• US 8,806,301 B2
• Filed: 11/19/2009
• Issued: 08/12/2014
• Est. Priority Date: 10/12/2009
• Status: Active Grant

• Current Assignee: Phison Electronics Corporation
• Original Assignee: Phison Electronics Corporation
• Inventors: Yu, Hsiang-Hsiung, Huang, Yi-Hsiang, Wu, Chung-Lin, Shen, Yu-Chung
• Primary Examiner(s): Baderman, Scott
• Assistant Examiner(s): KUDIRKA, JOSEPH R
• Application Number:
  US12/622,084
• Publication Number:
  US 20110087950A1
• Time in Patent Office: 1,727 Days
• Field of Search: 714/6.1, 714/6.13, 714/6.2, 714/6.24, 714/25, 714/47.1, 714/47.2, 714/47.3, 714/718, 714/763, 714/764, 714/773, 714/710, 711/100, 711102-104, 365/185.09, 365/185.24, 365/185.33
• US Class Current: 714/773
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 2029/0411 Online error correction
• CPC Class Codes: G11C 29/82 for EEPROMs

Abstract

A data writing method for writing data from a host system into a flash memory chip is provided, and the flash memory chip has a plurality of physical blocks. The method includes receiving a host writing command and write data thereof, and executing the host writing command. The method also includes giving a data program command for writing the write data into one of the physical blocks of the flash memory chip, and giving a command for determining whether data stored in the physical block has any error bit. Accordingly, the method can effectively ensure the correctness of data to be written into the flash memory chip.

Claims

1. A data writing method for ensuring data writing correctly from a host system into a flash memory chip, wherein the flash memory chip includes a plurality of physical blocks, and each of the physical blocks has a plurality of physical pages, the data writing method comprising:

grouping the physical blocks into at least a data area, a spare area and a replacement area;

receiving a host write command and write data corresponding to the host write command from the host system and executing the host write command by the flash memory controller;

giving a data program command to the flash memory chip during the execution of the host write command to write the write data into one of the physical blocks of the spare area; and

giving a read command to the flash memory chip before sending an acknowledgement message informing that the host write command is completed to the host system to determine whether at least a portion of data stored in one of the physical pages in the one of the physical blocks corresponding to the host write command has at least one error bit,

wherein if the at least a portion of data stored in the one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is not larger than the maximum number of error correcting bits and is larger than an error bit threshold value, moving data stored in the one of the physical block to another physical block selected from the replacement area, and marking the one of the physical block as a bad physical block,

wherein if the at least a portion of data stored in the one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is not larger than an error bit threshold value, marking the one of the physical block as an unreliable physical block,

wherein the unreliable physical block is used for writing data only when the physical blocks of the replacement area are exhausted.

2. The data writing method according to claim 1, wherein the flash memory controller has an error checking and correcting unit,

wherein the step of giving the read command to the flash memory chip before sending the acknowledgement message informing that the host write command is completed to the host system to determine whether the at least a portion of data stored in one of the physical pages in the one of the physical blocks has the at least one error bit comprises:

giving the read command to the flash memory chip to read data from the one of the physical blocks; and

determining whether the at least a portion of data stored in the one of the physical blocks has the at least one error bit according to the read data through the error checking and correcting unit.

3. The data writing method according to claim 1, wherein the data writing method further comprises:

when the at least a portion of data stored in the one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is larger than the maximum number of error correcting bits, moving data stored in other physical pages in the one of the physical blocks having the at least one error bit to another physical block selected from the replacement area, and marking the one of the physical blocks as a bad physical block.

4. The data writing method according to claim 1, further comprising:

sending a write error message to the host system by the flash memory controller when the at least a portion of data in the one of the physical blocks has the at least one error bit and is corresponding to the host write command.

5. The data writing method according to claim 1, further comprising:

using an unreliable physical block table to record the unreliable physical block.

6. A flash memory controller for ensuring data writing correctly from a host system into a flash memory chip, wherein the flash memory chip includes a plurality of physical blocks, and each of the physical blocks has a plurality of physical pages, the flash memory controller comprising:

a microprocessor unit;

a flash memory interface unit, coupled to the microprocessor unit, and configured to connect to the flash memory chip;

a host interface unit, coupled to the microprocessor unit and configured to receive a host write command and write data corresponding to the host write command from the host system; and

a physical memory management unit, coupled to the microprocessor unit and configured to group the physical blocks into at least a data area, a spare area and a replacement area,

wherein the physical memory management unit gives a data program command to the flash memory chip during execution of the host write command to write the write data into one of the physical blocks of the spare area,

wherein the physical memory management unit gives a read command to the flash memory chip before sending an acknowledgement message informing that the host write command is completed to the host system to determine whether at least a portion of data stored in one of the physical pages in the one of the physical blocks corresponding to the host write command has at least one error bit,

wherein if the at least a portion of data stored in the one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is not larger than the maximum number of error correcting bits and is larger than an error bit threshold value, the physical memory management unit moves data stored in the one of the physical blocks to another physical block selected from the replacement area and marks the one of the physical blocks as a bad physical block,

wherein if the at least a portion of data stored in the one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is not larger than an error bit threshold value, the physical memory management unit marks the one of the physical blocks as an unreliable physical block,

wherein the physical memory management unit uses the unreliable physical block for writing data only when the physical blocks of the replacement area are exhausted.

7. The flash memory controller according to claim 6, further comprising an error checking and correcting unit,

wherein the physical memory management unit gives the read command to the flash memory chip to read data from the one of the physical blocks, and the error checking and correcting unit determines whether the at least a portion of data stored in the one of the physical blocks has the at least one error bit according to the read data during the execution of the host write command.

8. The flash memory controller according to claim 6, and

wherein when the at least a portion of data stored in the one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is larger than the maximum number of error correcting bits, the physical memory management unit moves data stored in the other physical pages in the one of the physical blocks having the at least one error bit to another physical block among the physical blocks and marks the one of the physical block as a bad physical block.

9. The flash memory controller according to claim 6, wherein when the at least a portion of data in the one of the physical blocks has the at least one error bit and is corresponding to the host write command, the physical memory management unit sends a write error message to the host system.

10. A flash memory storage system for ensuring data writing correctly, comprising:

a flash memory chip having a plurality of physical blocks, wherein each of the physical blocks has a plurality of physical pages;

a connector, configured to connect to a host system and to receive a host write command and write data corresponding to the host write command from the host system; and

a flash memory controller, coupled to the flash memory chip and the connector, and configured to group the physical blocks into at least a data area, a spare area and a replacement area,

wherein the flash memory controller gives a data program command to the flash memory chip during execution of the host write command to write the write data into one of the physical blocks of the spare area,

wherein the flash memory controller gives a read command to the flash memory chip before sending an acknowledgement message informing that the host write command is completed to the host system to determine whether at least a portion of data stored in one of the physical pages in the one of the physical blocks corresponding to the host write command has at least one error bit,

wherein if at least a portion of data stored in the one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is not larger than the maximum number of error correcting bits and is larger than an error bit threshold value, the flash memory controller moves data stored in the one of the physical blocks to another physical block selected from the replacement area and marks the one of the physical blocks as a bad physical block,

wherein if the at least a portion of data stored in the one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is not larger than an error bit threshold value, the flash memory controller marks the one of the physical blocks as an unreliable physical block,

wherein the flash memory controller uses the unreliable physical block for writing data only when the physical blocks of the replacement area are exhausted.

11. The flash memory storage system according to claim 10, wherein the flash memory controller has an error checking and correcting unit,

wherein the flash memory controller gives the read command to the flash memory chip to read data from the one of the physical blocks, and the error checking and correcting unit determines whether the at least a portion of data stored in the one of the physical blocks has the at least one error bit according to the read data during the execution of the host write command.

12. The flash memory storage system according to claim 10, and

wherein when the at least a portion of data stored in the one of the physical pages in the one of the physical blocks has the at least one error bit and the number of the at least one error bit is larger than the maximum number of error correcting bits, the flash memory controller moves data stored in other physical pages in the one of the physical blocks having the at least one error bit to another physical block among the physical blocks and marks the one of the physical blocks as a bad physical block.

13. The flash memory storage system according to claim 10, wherein when the at least a portion of data in the one of the physical blocks has the at least one error bit and is corresponding to the host write command, the flash memory controller sends a write error message to the host system by the flash memory controller.