MEMS device and interposer and method for integrating MEMS device and interposer

• US 8,809,135 B2
• Filed: 02/01/2010
• Issued: 08/19/2014
• Est. Priority Date: 01/02/2001
• Status: Active Grant

• Current Assignee: Charles Stark Draper Laboratory Incorporated
• Original Assignee: Charles Stark Draper Laboratory Incorporated
• Inventors: Sawyer, William D.
• Primary Examiner(s): FOURSON III, GEORGE R
• Application Number:
  US12/697,713
• Publication Number:
  US 20110001198A1
• Time in Patent Office: 1,660 Days
• Field of Search: 438/159, 216/2
• US Class Current: 438/159
• CPC Class Codes: B81B 2203/0307 Anchors
• CPC Class Codes: B81B 7/0048 between the MEMS die and the substrate

Abstract

A method for producing Microelectromechanical Systems (MEMS) and related devices using Silicon-On-Insulator (SOI) wafer includes providing an SOI wafer, performing a mesa etch to at least partially define the MEMS device, bonding the SOI wafer to an interposer by direct boding, removing the handle layer of the SOI wafer, removing the oxide layer of the SOI wafer, and further etching the device layer of the SOI wafer to define the MEMS device. A structure manufactured according to the above described processes includes an interposer comprising an SOI wafer and a MEMS device mounted on the interposer. The MEMS device comprises posts extending from a silicon plate. The MEMS device is directly mounted to the interposer by bonding the posts of the MEMS device to the device layer of the interposer.

Claims

1. A Microelectromechanical Systems (MEMS) apparatus produced by a method comprising:

obtaining an SOI wafer, which comprises;

(i) a handle layer,

(ii) a dielectric layer on said handle layer, and

(iii) a device layer on said dielectric layer;

etching said device layer of said SOI wafer to at least partially define said MEMS device;

obtaining an interposer wafer;

bonding said SOI wafer to said interposer wafer in a way such that said device layer of said SOI wafer faces said interposer wafer;

removing said handle layer of said SOI wafer; and

removing said dielectric layer of the SOI wafer,

wherein said interposer wafer is manufactured from an SOI wafer, wherein said interposer wafer comprises;

(i) a handle layer,

(ii) a dielectric layer on said handle layer, and

(iii) a device layer on said dielectric layer.

2. The apparatus of claim 1, wherein said obtaining an interposer wafer comprises forming said interposer wafer from said SOI wafer, wherein said forming said interposer wafer from said SOI wafer comprises:

(a) forming contacts on said device layer and said handle layer of said interposer wafer; and

(b) etching said device layer and said dielectric layer of said interposer wafer to define active areas on said interposer wafer.

3. The apparatus of claim 1, comprising interconnect lines on said interposer wafer.

4. The apparatus of claim 1, wherein the method further comprises a step of forming an oxide layer at a bottom surface of said handle layer of said interposer wafer before the step of forming contacts on said device layer and said handle layer of said interposer wafer.

5. The apparatus of claim 1, comprising least one heater on said handle layer of said interposer wafer.

6. The apparatus of claim 1, further comprising at least one sensor on said handle layer of said interposer wafer.

7. A Microelectromechanical Systems (MEMS) apparatus produced by a method comprising:

obtaining a first SOI wafer, wherein said first SOI wafer comprises;

(i) a handle layer,

(ii) a dielectric layer on said handle layer, and

(iii) a device layer on said dielectric layer;

performing a mesa etch on said device layer to define at least one structural post;

obtaining a second SOI wafer, which comprises;

(i) a handle layer,

(ii) a dielectric layer on said handle layer, and

(iii) a device layer on said dielectric layer;

bonding said device layer of said second SOI wafer to said at least one structural post of said first SOI wafer;

removing said handle layer of said second SOI wafer; and

removing said dielectric layer of said second SOI wafer.

8. A Microelectromechanical Systems (MEMS) apparatus produced by a method comprising

obtaining a first SOI wafer, wherein said first SOI wafer comprises:

(i) a handle layer,

(ii) a dielectric layer on said handle layer, and

(iii) a device layer on said dielectric layer;

performing a mesa etch on said device layer to define an array of sets of structural posts, wherein each set of structural post includes at least one structural post;

obtaining a second SOI wafer, which comprises;

(i) a handle layer,

(ii) a dielectric layer on said handle layer, and

(iii) a device layer on said dielectric layer;

bonding said device layer of said second SOI wafer to said at least one structural post of said first SOI wafer;

removing said handle layer of said second SOI wafer;

removing said dielectric layer of said second SOI wafer;

etching said device layer of said second SOI wafer to define an array of said MEMS devices; and

separating the result structure into individual MEMS devices.