Method of fabricating vertical structure LEDs

• US 8,809,898 B2
• Filed: 01/25/2013
• Issued: 08/19/2014
• Est. Priority Date: 04/09/2002
• Status: Expired due to Term

• Current Assignee: Suzhou Lekin Semiconductor Company Limited
• Original Assignee: LG Innotek Company Limited (LG Corporation)
• Inventors: Lee, Jong Lam, Jeong, Inkwon, Yoo, Myung Cheol
• Primary Examiner(s): Mandala, Victor A
• Application Number:
  US13/750,376
• Publication Number:
  US 20140054639A1
• Time in Patent Office: 571 Days
• Field of Search: 257/79, 257/99, 257/103, 257/E33.025
• US Class Current: 257/99
• CPC Class Codes: H01C 7/006 Thin film resistors
• CPC Class Codes: H01C 7/008 Thermistors H01C7/02 - H01C7/06 take precedence
• CPC Class Codes: H01L 27/0802 Resistors only
• CPC Class Codes: H01L 28/20 Resistors
• CPC Class Codes: H01L 33/0025 comprising only AIIIBV compounds
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/36 characterised by the electrodes
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/40 Materials therefor
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: Y10S 438/958 Passivation layer
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.

Claims

1. A semiconductor light-emitting device, comprising:

a conductive support structure;

a semiconductor structure over the conductive support structure, the semiconductor structure having a first surface, a second surface, and a side surface, wherein the semiconductor structure comprises a p-type layer, an active layer on the p-type layer, and an n-type layer on the active layer, wherein the second surface is opposite the first surface, and wherein the first surface, relative to the second surface, is proximate to the conductive support structure;

a first metal electrically connected to the p-type layer, wherein the first metal is located between the conductive support structure and the first surface of the semiconductor structure;

a passivation layer comprising a first portion on the second surface of the semiconductor structure and a second portion on the side surface of the semiconductor structure, wherein the first portion has a first surface contacting the second surface of the semiconductor structure and a second surface opposite the first surface of the first portion; and

a second metal electrically connected to the n-type layer,

wherein the second metal is located on the second surface of the semiconductor structure, wherein the second metal comprises a first part located higher than the second surface of the first portion, and

wherein a contact area between the second metal and the semiconductor structure is greater than a contact area between the second metal and the passivation layer.

2. The device according to claim 1, wherein the second metal comprises a second part located lower than the second surface of the first portion.

3. The device according to claim 2, wherein the second part protrudes downwardly with respect to a level of the second surface of the first portion.

4. The device according to claim 2, wherein the second part protrudes from a level of the second surface of the first portion.

5. The device according to claim 1, wherein the first portion of the passivation layer contacts the second metal.

6. The device according to claim 1, wherein the second metal comprises;

an n-type electrode on the second surface of the semiconductor structure; and

a metallic pad on the n-type electrode.

7. The device according to claim 6, wherein the second surface of the first portion is located higher than the n-type electrode.

8. The device according to claim 1, wherein the second metal comprises one of Ti, Al, Cr, or Au.

9. A semiconductor light-emitting device, comprising:

a conductive support structure;

a semiconductor structure over the conductive support structure, the semiconductor structure having a first surface, a second surface, and a side surface,

wherein the semiconductor structure comprises a p-type layer, an active layer on the p-type layer, and an n-type layer on the active layer,

wherein the second surface is opposite the first surface, and wherein the first surface, relative to the second surface, is proximate to the conductive support structure;

a p-type electrode electrically connected to the p-type layer, wherein the p-type electrode is located between the conductive support structure and the first surface of the semiconductor structure;

a passivation layer comprising a first portion on the second surface of the semiconductor structure and a second portion on the side surface of the semiconductor structure, wherein the first portion has a first surface contacting the second surface of the semiconductor structure and a second surface opposite the first surface of the first portion;

an n-type electrode electrically connected to the n-type layer, wherein the n-type electrode is located on the second surface of the semiconductor structure; and

a metallic pad on the n-type electrode,

wherein the metallic pad comprises a first part located higher than the second surface of the first portion, and

wherein a width of the metallic pad is smaller than a width of the semiconductor structure.

10. The device according to claim 9, wherein the metallic pad comprises a second part located lower than the second surface of the first portion.

11. The device according to claim 10, wherein the second part protrudes downwardly with respect to a level of the second surface of the first portion.

12. The device according to claim 10, wherein the second part protrudes from a level of the second surface of the first portion.

13. The device according to claim 9, wherein the first portion of the passivation layer contacts the n-type electrode.

14. The device according to claim 9, wherein the metallic pad has an uneven surface.

15. The device according to claim 14, wherein the uneven surface faces the n-type electrode.

16. The device according to claim 9, wherein the second surface of the first portion is located higher than the n-type electrode.

17. The device according to claim 9, wherein the metallic pad comprises one of Cr or Au.

18. A semiconductor light-emitting device, comprising:

a conductive support structure;

a semiconductor structure over the conductive support structure, the semiconductor structure having a first surface, a second surface, and a side surface,

wherein the semiconductor structure comprises a p-type layer, an active layer on the p-type layer, and an n-type layer on the active layer,

wherein the second surface is opposite the first surface, and wherein the first surface, relative to the second surface, is proximate to the conductive support structure;

a first metal electrically connected to the p-type layer, wherein the first metal is located between the conductive support structure and the first surface of the semiconductor structure;

a passivation layer comprising a first portion on the second surface of the semiconductor structure and a second portion on the side surface of the semiconductor structure; and

a second metal electrically connected to the n-type layer, wherein the second metal is located on the second surface of the semiconductor structure,

wherein the first portion has a first surface on the second surface of the semiconductor structure and the second metal,

wherein the first portion has a second surface opposite the first surface of the first portion,

wherein the second metal comprises a first part located higher than the second surface of the first portion, and

wherein a contact area between the second metal and the semiconductor structure is greater than a contact area between the second metal and the passivation layer.

19. The device according to claim 18, wherein the conductive support structure comprises a metal layer.

20. The device according to claim 18, wherein the second metal comprises one of Ti, Al, Cr, or Au.